IP Library › Granted Patent US 11,474,546
Granted Patent B2
US 11,474,546 · App. 17/012,478 · Granted Oct 18, 2022

Method of operating a low dropout regulator by selectively removing and replacing a DC bias from a power transistor within the low dropout regulator

Inventors: Kapil Kumar Tyagi (Greater Noida, IN); Nitin Gupta (Kurukshetra, IN)
Assignee: STMicroelectronics International N.V.
G05F1/468G05F1/575G05F1/613G05F1/561
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Quick Facts
Patent No.
US 11,474,546
App. No.
17/012,478
Granted
Oct 18, 2022
Kind
B2
Abstract

A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.

Claims (58)

1. A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises:

placing the electronic device into a power on mode by:

turning on the low dropout regulator,

removing a DC bias from the second conduction terminal of the transistor by opening a first switch that is for selectively coupling the second conduction terminal of the transistor to a supply node through a first impedance and by opening a second switch that is for selectively coupling the second conduction terminal of the transistor to a ground node through a second impedance, and

turning on the transistor; and

placing the electronic device into a power down mode by:

turning off the transistor,

applying the DC bias at the second conduction terminal of the transistor, and

turning off the low dropout regulator;

wherein turning on the low dropout regulator comprises:

opening a fourth switch that selectively couples an output of an amplifier of the low dropout regulator to the supply node,

opening a third switch that selectively couples the output of the low dropout regulator to the supply node, and

opening a sixth switch that selectively couples a resistive divider to the ground node.

2. The method of claim 1 , wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor before the DC bias is removed from the second conduction terminal of the transistor.

3. The method of claim 1 , wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor after the DC bias is removed from the second conduction terminal of the transistor.

4. The method of claim 1 , wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor along with removing the DC bias from the second conduction terminal of the transistor.

5. The method of claim 1 , wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor before the DC bias is applied at the second conduction terminal of the transistor.

6. The method of claim 1 , wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor after the DC bias is applied at the second conduction terminal of the transistor.

7. The method of claim 1 , wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor along with applying the DC bias at the second conduction terminal of the transistor.

8. The method of claim 1 , wherein turning on the low dropout regulator is performed prior to removing the DC bias from the second conduction terminal of the transistor.

9. The method of claim 1 , wherein turning on the transistor is performed by coupling a control terminal of the transistor to the ground node.

10. The method of claim 1 , wherein turning off the transistor is performed by coupling a control terminal of the transistor to the supply node.

11. The method of claim 1 , wherein applying the DC bias at the second conduction terminal of the transistor is performed by closing the first switch and closing the second switch.

12. The method of claim 1 , wherein the first impedance is provided by at least one diode circuit and wherein the second impedance is provided by at least one diode circuit.

13. A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises:

placing the electronic device into a power on mode by:

turning on the low dropout regulator,

removing a DC bias from the second conduction terminal of the transistor by selectively decoupling the second conduction terminal of the transistor from a supply node and a ground node, and

turning on the transistor; and

placing the electronic device into a power down mode by:

turning off the transistor,

applying the DC bias at the second conduction terminal of the transistor by selectively coupling the second conduction terminal of the transistor to the supply node and the ground node, and

turning off the low dropout regulator;

wherein turning on the transistor when placing the electronic device into the power on mode comprises turning on the transistor after the DC bias is removed from the second conduction terminal of the transistor;

wherein the low dropout regulator is turned on by:

opening a first switch to decouple an output of an amplifier of the low dropout regulator from the supply node,

opening a second switch to decouple the output of the low dropout regulator from the supply node, and

opening a third switch to couple a resistive divider to the ground node.

14. The method of claim 13 , wherein turning on the transistor is performed by selectively coupling a control terminal of the transistor to the ground node.

15. The method of claim 13 , wherein turning off the transistor is performed by selectively coupling a control terminal of the transistor to the supply node.

16. The method of claim 13 , wherein the DC bias is generated via a first impedance coupled between the second conduction terminal of the transistor and the supply node and a second impedance coupled between the second conduction terminal and the ground node.

17. A method of operating an electronic device comprised of a low dropout regulator having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node of the electronic device, wherein the method comprises:

placing the electronic device into a power on mode by:

turning on the low dropout regulator,

removing a DC bias from the second conduction terminal of the transistor by selectively decoupling the second conduction terminal of the transistor from a supply node and a ground node, and

turning on the transistor; and

placing the electronic device into a power down mode by:

turning off the transistor,

applying the DC bias at the second conduction terminal of the transistor by selectively coupling the second conduction terminal of the transistor to the supply node and the ground node, and

turning off the low dropout regulator;

wherein turning off the transistor when placing the electronic device into the power down mode comprises turning off the transistor after the DC bias is applied at the second conduction terminal of the transistor;

wherein the low dropout regulator is turned on by:

opening a first switch to decouple an output of an amplifier of the low dropout regulator from the supply node,

opening a second switch to decouple the output of the low dropout regulator from the supply node, and

opening a third switch to couple a resistive divider to the ground node.

18. The method of claim 17 , wherein turning on the transistor is performed by selectively coupling a control terminal of the transistor to the ground node.

19. The method of claim 17 , wherein turning off the transistor is performed by selectively coupling a control terminal of the transistor to the supply node.

20. The method of claim 17 , wherein the DC bias is generated via a first impedance coupled between the second conduction terminal of the transistor and the supply node and a second impedance coupled between the second conduction terminal and the ground node.

Continuity (3)
Continuation 16217872 · Dec 12, 2018
Division 15475266 · Mar 31, 2017
Related Publication 20200401169A1 · Dec 24, 2020
Cited By (1)
US 12,730,465