System and method for providing limited utilization run time application control as a service in microcontrollers

1. An apparatus comprising:

a memory device; and

a microcontroller device integrated with the memory device and configured to control access to the memory device by a processor device, the microcontroller device configured to:

set an access permission for controlled data stored by the memory device based on authorization data stored in the memory device, the authorization data to indicate a number of authorized accesses the processor device is granted to the controlled data, a count of authorized accesses to the controlled data, and a granted access duration;

receive, from the processor device, a request to access the controlled data; and

determine whether to initiate access to the controlled data by the processor device based on the access permission; and

determine an elapsed access duration based on an indicator from a clock device indicating an elapsed time following an authorized access corresponding to the request, and prior to receipt of an access complete message corresponding to the request; and

wherein the microcontroller is configured to set the access permission for the controlled data also based on a comparison of the elapsed access duration to the granted access duration.

2. The apparatus of claim 1 , wherein managing access by the processor device to the controlled data stored on the memory device further includes setting the access permission for the controlled data based on a comparison of the number of granted accesses and the count of accesses.

3. The apparatus of claim 2 , wherein the microcontroller device is further configured to:

initiate transmission of the controlled data to the processor device based on the access permission;

update the count of accesses in response to initiating transmission of the controlled data; and

update the access permission based on the updated count.

4. The apparatus of claim 2 , wherein the memory device further comprises a hardware interrupt mechanism configured to transmit a signal to the microcontroller device in response to access to the controlled data, wherein the microcontroller device is further configured to:

update the count of accesses in response to the signal; and

update the access permission based on the updated count.

5. The apparatus of claim 1 , wherein the microcontroller device is further configured to update the authorization data based on a signal received during a hardware boot process.

6. The apparatus of claim 1 , wherein the memory device comprises a flash memory device.

7. A method comprising:

managing, at a microcontroller device integrated into a memory device, access by a processor device to data stored on the memory device, wherein managing access by the processor device to the data stored on the memory device includes:

setting an access permission for controlled data stored by the memory device based on authorization data stored in the memory device, the authorization data indicating a number of authorized accesses the processor device is granted to the controlled data, a count of authorized accesses to the controlled data, and a granted access duration;

receiving, from the processor device, a request to access the controlled data; and

determining whether to initiate access to the controlled data by the processor device based on the access permission;

determining an elapsed access duration based on an indicator from a clock device that indicates an elapsed time following an authorized access corresponding to the request and prior to receipt of an access complete message corresponding to the request;

wherein setting the access permission for the controlled data includes setting the access permission for the controlled data based on a comparison of the elapsed access duration to the granted access duration.

8. The method of claim 7 , further comprising setting the access permission for the controlled data based on a comparison of the number of granted accesses and the count of accesses.

9. The method of claim 8 , further comprising:

initiating transmission of the controlled data to the processor device based on the access permission;

updating the count of accesses in response to initiating transmission of the controlled data; and

updating the access permission based on the updated count.

10. The method of claim 8 , further comprising:

updating the count of accesses in response to a signal from a hardware interrupt mechanism indicating access to the controlled data; and

determining whether to update the authorization data based on the updated count.

11. The method of claim 7 , further comprising updating the authorization data based on a signal received during a hardware boot process.

12. The method of claim 7 , wherein the memory device comprises a flash memory device.

13. A computer readable storage device storing instructions executable by one or more processors to manage, at a microcontroller device integrated into a memory device, access by a processor device to data stored on the memory device, wherein the instructions cause the one or more processors to:

set an access permission for controlled data stored by the memory device based on authorization data stored in the memory device, the authorization data to indicate a number of authorized accesses to the controlled data granted to the processor device, a count of authorized accesses to the controlled data, and a granted access duration;

receive, from the processor device, a request to access the controlled data; and

determine whether to initiate access to the controlled data by the processor device based on the access permission;

determine an elapsed access duration based on an indicator from a clock device indicating an elapsed time following an authorized access corresponding to the request, and prior to receipt of an access complete message corresponding to the request; and

wherein the instructions cause the one or more processors to set the access permission for the controlled data also based on a comparison of the elapsed access duration to the granted access duration.

14. The computer readable storage device of claim 13 , herein the instructions cause the one or more processors to set the access permission for the controlled data based on a comparison of the number of granted accesses and the count of accesses.

15. The computer readable storage device of claim 14 , wherein the instructions cause the one or more processors to:

initiate transmission of the controlled data to the processor device based on the access permission;

update the count of accesses in response to initiating transmission of the controlled data; and

update the access permission based on the updated count.

16. The computer readable storage device of claim 14 , wherein the instructions cause the one or more processors to:

update the count of accesses in response to a signal received from a hardware interrupt mechanism indicating access to the controlled data; and

update the access permission based on the updated count.

17. The computer readable storage device of claim 13 , wherein the instructions are further executable by the one or more processors to update the authorization data based on a signal received during a hardware boot process.