IP Library › Granted Patent US 11,475,832
Granted Patent B2
US 11,475,832 · App. 17/393,429 · Granted Oct 18, 2022

Display device, operation method thereof, and electronic device

Inventors: Susumu Kawashima (Atsugi, JP); Koji Kusunoki (Isehara, JP); Kazunori Watanabe (Machida, JP); Kouhei Toyotaka (Atsugi, JP); Kei Takahashi (Isehara, JP); Kentaro Hayashi (Atsugi, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G09G3/3225H01L27/3262H01L27/3265H01L27/3276H01L29/7869G09G2300/0452G09G2310/0297G09G2320/0626G09G2360/144
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Quick Facts
Patent No.
US 11,475,832
App. No.
17/393,429
Granted
Oct 18, 2022
Kind
B2
Abstract

A display device that can display a high-luminance image is provided. The display device includes a display element and a memory circuit which is electrically connected to a first wiring and a second wiring. First, a reference potential is supplied to the first wiring. Next, a first image signal is supplied to the memory circuit through the second wiring. Then, the second image signal is added to the first image signal by supplying the second image signal to the memory circuit through the first wiring. After that, an image obtained by superimposing an image corresponding to the first image signal and an image corresponding to the second image signal on each other is displayed with the display element.

Claims (54)

1. A display device comprising:

a pixel; and

a circuit,

wherein the pixel comprises a first transistor, a second transistor, a third transistor, a first capacitor, a second capacitor, and a display element,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the first capacitor,

wherein the other of the source and the drain of the first transistor is electrically connected to a first wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the other electrode of the first capacitor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the one electrode of the first capacitor is electrically connected to a gate of the third transistor,

wherein the gate of the third transistor is electrically connected to one electrode of the second capacitor,

wherein one of a source and a drain of the third transistor is electrically connected to the other electrode of the second capacitor and one electrode of the display element,

wherein the circuit is electrically connected to the first wiring and the second wiring,

wherein the circuit is configured to supply a first image signal to the first wiring,

wherein the circuit is configured to supply a reference potential to the second wiring, and

wherein the circuit is configured to supply a second image signal to the second wiring.

2. The display device according to claim 1 , wherein the reference potential is a potential having a value corresponding to an illuminance of external light.

3. The display device according to claim 2 , wherein the reference potential is lower as the illuminance of the external light is higher.

4. The display device according to claim 2 , wherein the reference potential is a negative potential.

5. The display device according to claim 1 , wherein a capacitance value of the first capacitor is higher than a capacitance value of the second capacitor.

6. The display device according to claim 1 , wherein the display element is an organic EL element.

7. The display device according to claim 1 ,

wherein the first transistor comprises a metal oxide in a channel formation region of the first transistor,

wherein the metal oxide comprises In, Zn, and M, and

wherein M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.

8. An electronic device comprising:

the display device according to claim 1 ; and

a camera.

9. A display device comprising:

a pixel; and

a circuit,

wherein the pixel comprises a first transistor, a second transistor, a third transistor, a first capacitor, a second capacitor, and a display element,

wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the first capacitor,

wherein the other of the source and the drain of the first transistor is electrically connected to a first wiring,

wherein one of a source and a drain of the second transistor is electrically connected to the other electrode of the first capacitor,

wherein the other of the source and the drain of the second transistor is electrically connected to a second wiring,

wherein the one electrode of the first capacitor is electrically connected to a first gate of the third transistor,

wherein the first gate of the third transistor is electrically connected to a second gate of the third transistor and one electrode of the second capacitor,

wherein one of a source and a drain of the third transistor is electrically connected to the other electrode of the second capacitor and one electrode of the display element,

wherein the circuit is electrically connected to the first wiring and the second wiring,

wherein the circuit is configured to supply a first image signal to the first wiring,

wherein the circuit is configured to supply a reference potential to the second wiring, and

wherein the circuit is configured to supply a second image signal to the second wiring.

10. The display device according to claim 9 , wherein the reference potential is a potential having a value corresponding to an illuminance of external light.

11. The display device according to claim 10 , wherein the reference potential is lower as the illuminance of the external light is higher.

12. The display device according to claim 10 , wherein the reference potential is a negative potential.

13. The display device according to claim 9 , wherein a capacitance value of the first capacitor is higher than a capacitance value of the second capacitor.

14. The display device according to claim 9 , wherein the display element is an organic EL element.

15. The display device according to claim 9 ,

wherein the first transistor comprises a metal oxide in a channel formation region of the first transistor,

wherein the metal oxide comprises In, Zn, and M, and

wherein M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.

16. An electronic device comprising:

the display device according to claim 9 ; and

a camera.

Priority Claims (2)
JP JP2017-216389 · Nov 9, 2017 · national
JP JP2018-028368 · Feb 21, 2018 · national
Continuity (2)
Continuation 16758108
Related Publication 20210366381A1 · Nov 25, 2021
Cited By (1)
US 12,536,969