IP Library › Granted Patent US 11,476,849
Granted Patent B2
US 11,476,849 · App. 17/141,706 · Granted Oct 18, 2022

High power positive logic switch

Inventor: Payman Shanjani (San Diego, CA)
Assignee: pSemi Corporation
H03K17/6872H03K19/017
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Quick Facts
Patent No.
US 11,476,849
App. No.
17/141,706
Granted
Oct 18, 2022
Kind
B2
Abstract

A positive-logic FET switch stack that does not require a negative bias voltage, and which can withstand application of a high voltage RF signal without requiring terminal capacitors. Some embodiments include a stack of FET switches, with at least one FET requiring a negative V GS to turn OFF and configured so as to not require a negative voltage, series-coupled on at least one end to an end-cap FET that turns OFF when the V GS of such end-cap FET is essentially zero volts, wherein at least one end-cap FET is configured to be coupled to a corresponding RF signal source and has a gate coupled to the corresponding RF signal source through an associated switch circuit. The switch circuit may include an NMOSFET and a PMOSFET, or a diode and an NMOSFET, or a diode and an NMOSFET and a PMOSFET.

Claims (24)

1. A stack of FET switches, at least one FET switch of the stack of FET switches requiring a relatively negative V GS to turn OFF and configured so as to not require a negative voltage, the stack of FET switches series-coupled on at least one end to a respective end-cap FET that turns OFF when the V GS of such end-cap FET is essentially zero volts, wherein at least one of the respective end-cap FETs is configured to be coupled to a corresponding RF signal source and has a gate couplable to the corresponding RF signal source through an associated switch circuit.

2. The invention of claim 1 , wherein the switch circuit includes an NMOSFET.

3. The invention of claim 1 , wherein the switch circuit includes an NMOSFET series-coupled to a PMOSFET.

4. The invention of claim 1 , wherein the switch circuit includes a diode series-coupled to a NMOSFET.

5. The invention of claim 1 , wherein the switch circuit includes a diode, NMOSFET, and PMOSFET coupled in series.

6. The invention of claim 1 , wherein the switch circuit includes a capacitor series-coupled to a NMOSFET.

7. The invention of claim 1 , wherein the switch circuit includes a capacitor, NMOSFET, and PMOSFET coupled in series.

8. A stack of FET switches, at least one FET switch of the stack of FET switches requiring a relatively negative V GS to turn OFF and configured to operate with positive control voltages, the stack of FET switches series-coupled on at least one end to a respective end-cap FET that turns OFF when the V GS of such end-cap FET is essentially zero volts, wherein at least one of the respective end-cap FETs is configured to be coupled to a corresponding RF signal source and has a gate couplable to the corresponding RF signal source through an associated switch circuit.

9. The invention of claim 8 , wherein the switch circuit includes an NMOSFET.

10. The invention of claim 8 , wherein the switch circuit includes an NMOSFET series-coupled to a PMOSFET.

11. The invention of claim 8 , wherein the switch circuit includes a diode series-coupled to a NMOSFET.

12. The invention of claim 8 , wherein the switch circuit includes a diode, NMOSFET, and PMOSFET coupled in series.

13. The invention of claim 8 , wherein the switch circuit includes a capacitor series-coupled to a NMOSFET.

14. The invention of claim 8 , wherein the switch circuit includes a capacitor, NMOSFET, and PMOSFET coupled in series.

15. A FET switch stack, including:

(a) one or more positive-logic FETs requiring a relatively negative V GS to turn OFF and configured so as to not require a negative voltage;

(b) a first end-cap FET that turns OFF when the V GS of the first end-cap FET is essentially zero volts, series-coupled to a first end of the one or more series-coupled positive-logic FETs, wherein the first end-cap FET has a gate and is configured to be coupled to a corresponding RF signal source; and

(c) at least one switch circuit, each coupled between the gate of the first end-cap FET and the corresponding RF signal source.

16. The invention of claim 15 , wherein the switch circuit includes an NMOSFET.

17. The invention of claim 15 , wherein the switch circuit includes an NMOSFET series-coupled to a PMOSFET.

18. The invention of claim 15 , wherein the switch circuit includes a diode series-coupled to a NMOSFET.

19. The invention of claim 15 , wherein at least one of the at least one switch circuit includes a diode, NMOSFET, and PMOSFET coupled in series.

20. The invention of claim 15 , wherein the switch circuit includes a capacitor series-coupled to a NMOSFET.

21. The invention of claim 15 , wherein the switch circuit includes a capacitor, NMOSFET, and PMOSFET coupled in series.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2021
From: SHANJANI, PAYMAN
To: PSEMI CORPORATION
Reel/Frame 055723/0750 →
Continuity (2)
Provisional Application 62957705 · Jan 6, 2020
Related Publication 20210211127A1 · Jul 8, 2021
Cited By (1)
US 12,341,478