Display system and vehicle
An object is to provide a display system with a novel structure and a vehicle. The display system includes a display and a control IC. The control IC includes a frame memory, an arithmetic circuit, and a memory circuit. The display has a curved display surface. The frame memory has a function of holding first image data dedicated to displaying an image on a flat surface. The memory circuit has a function of storing shape data on the display. The arithmetic circuit has a function of converting first coordinates of the curved display surface into second coordinates of the flat surface included in the first image data, by performing arithmetic operation in accordance with the shape data. The arithmetic circuit has a function of outputting the first image data stored in the frame memory to the display as second image data on the basis of the second coordinates.
1. A vehicle comprising:
a window; and
a dashboard, the dashboard comprising:
a display system, the display system comprising:
a display comprising a curved display surface; and
a control IC comprising a frame memory, an arithmetic circuit, and a memory circuit,
wherein:
the frame memory is configured to hold first image data for displaying an image on a flat surface,
the memory circuit is configured to store shape data on the display,
the arithmetic circuit is configured to convert first coordinates of the curved display surface into second coordinates of the flat surface included in the first image data, by performing arithmetic operation in accordance with the shape data,
the arithmetic circuit is configured to output the first image data stored in the frame memory to the display as second image data in accordance with the second coordinates,
wherein the memory circuit comprises a transistor and a capacitor, and
wherein the transistor comprises an oxide semiconductor in a semiconductor layer comprising a channel formation region.
2. The vehicle according to claim 1 ,
wherein the arithmetic circuit comprises a product-sum operation circuit, and
wherein the product-sum operation circuit comprises an analog circuit configured to perform product-sum operation.
3. A vehicle comprising:
a window; and
a dashboard, the dashboard comprising:
a display system, the display system comprising:
a display comprising a curved display surface; and
a control IC comprising a memory, a first circuit, and a second circuit,
wherein:
the memory is configured to hold first image data for displaying an image on a flat surface,
the second circuit is configured to store third data,
the first circuit is configured to convert first coordinates into second coordinates by performing arithmetic operation in accordance with the third data,
the first circuit is configured to output the first image data stored in the memory to the display as second image data in accordance with the second coordinates,
wherein the second circuit comprises a transistor and a capacitor, and
wherein the transistor comprises an oxide semiconductor in a semiconductor layer comprising a channel formation region.
4. The vehicle according to claim 3 ,
wherein the first circuit comprises a product-sum operation circuit, and
wherein the product-sum operation circuit comprises an analog circuit configured to perform product-sum operation.
5. A display system comprising:
a display comprising a curved display surface; and
a control IC comprising a frame memory, an arithmetic circuit, and a memory circuit,
wherein:
the frame memory is configured to hold first image data for displaying an image on a flat surface,
the memory circuit is configured to store shape data on the display,
the arithmetic circuit is configured to convert first coordinates of the curved display surface into second coordinates of the flat surface included in the first image data, by performing arithmetic operation in accordance with the shape data,
the arithmetic circuit is configured to output the first image data stored in the frame memory to the display as second image data in accordance with the second coordinates,
wherein the memory circuit comprises a transistor and a capacitor, and
wherein the transistor comprises an oxide semiconductor in a semiconductor layer comprising a channel formation region.