IP Library › Granted Patent US 11,482,472
Granted Patent B2
US 11,482,472 · App. 16/007,260 · Granted Oct 25, 2022

Thermal management solutions for stacked integrated circuit devices

Inventors: Feras Eid (Chandler, AZ); Adel Elsherbini (Chandler, AZ); Johanna Swan (Scottsdale, AZ)
Assignee: Intel Corporation
H01L23/473H01L21/4882H01L23/13H01L23/3157H01L23/3677H01L23/467H01L23/49822H01L24/17H01L24/32H01L25/0652H01L25/0655H01L24/16H01L24/73
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Quick Facts
Patent No.
US 11,482,472
App. No.
16/007,260
Granted
Oct 25, 2022
Kind
B2
Abstract

An integrated circuit assembly may be formed having a substrate, a first integrated circuit device electrically attached to the substrate, a second integrated circuit device electrically attached to the first integrated circuit device, and a heat dissipation device defining a fluid chamber, wherein at least a portion of the first integrated circuit device and at least a portion of the second integrated circuit device are exposed to the fluid chamber. In further embodiments, at least one channel may be formed in an underfill material between the first integrated circuit device and the second integrated circuit device, between the first integrated circuit device and the substrate, and/or between the second integrated circuit device and the substrate, wherein the at least one channel is open to the fluid chamber.

Claims (29)

1. An integrated circuit assembly, comprising:

a substrate;

a first integrated circuit device having a first surface and an opposing second surface, wherein the first integrated circuit device is electrically attached to the substrate with a first plurality of device-to-substrate interconnects extending between the first surface of the first integrated circuit device and the substrate;

a second integrated circuit device having a first surface and an opposing second surface, wherein the first surface of the second integrated circuit device is electrically attached to the second surface of the first integrated circuit device with a plurality of device-to-device interconnects;

an underfill material surrounding each of the plurality of device-to-device interconnects;

a heat dissipation device defining a fluid chamber, wherein at least a portion of the second surface of the first integrated circuit device is exposed to the fluid chamber and wherein at least a portion of the second surface of the second integrated circuit device is exposed to the fluid chamber; and

at least one channel formed within the underfill material, wherein the at least one channel is open to the fluid chamber and wherein at least a portion of the first surface of the second integrated circuit device is exposed within the at least one channel.

2. The integrated circuit assembly of claim 1 , wherein the substrate further includes a recess and wherein at least a portion of the first integrated circuit device resides within the recess.

3. The integrated circuit assembly of claim 1 , wherein the first surface of the second integrated circuit device is electrically attached to the substrate with a second plurality of device-to-substrate interconnects extending between the first surface of the second integrated circuit device and the substrate.

4. The integrated circuit assembly of claim 1 , further including at least one heat dissipation projection extending into the fluid chamber from at least one of the second surface of the first integrated circuit device and the second surface of the second integrated circuit device.

5. The integrated circuit assembly of claim 1 , wherein the heat dissipation device comprises a main body, having a first surface and an opposing second surface, and a boundary wall extending from the first surface of the main body.

6. The integrated circuit assembly of claim 5 , wherein at least a portion of the boundary wall of the heat dissipation device is sealed to the substrate.

7. The integrated circuit assembly of claim 5 , wherein the heat dissipation device includes an input conduit extending from the second surface of the main body to the first surface of the main body, and an output port extending from the first surface of the main body to the second surface of the main body.

8. The integrated circuit assembly of claim 5 , wherein the heat dissipation device comprises a plurality of heat dissipation projections extending from the first surface of the main body of the heat dissipation device.

9. The integrated circuit assembly of claim 1 , further comprising a heat transfer fluid disposed in the heat dissipation device defining a fluid chamber of the heat dissipation device.

10. An integrated circuit assembly, comprising:

a substrate;

a first integrated circuit device having a first surface and an opposing second surface, wherein the first integrated circuit device is electrically attached to the substrate with a first plurality of device-to-substrate interconnects extending between the first surface of the first integrated circuit device and the substrate;

a second integrated circuit device having a first surface and an opposing second surface, wherein the first surface of the second integrated circuit device is electrically attached to the second surface of the first integrated circuit device with a plurality of device-to-device interconnects, and wherein the first surface of the second integrated circuit device is electrically attached to the substrate with a second plurality of device-to-substrate interconnects extending between the first surface of the second integrated circuit device and the substrate;

an underfill material surrounding each of the second plurality of device-to-substrate interconnects;

a heat dissipation device defining a fluid chamber, wherein at least a portion of the second surface of the first integrated circuit device is exposed to the fluid chamber and wherein at least a portion of the second surface of the second integrated circuit device is exposed to the fluid chamber; and

at least one channel formed within the underfill material, wherein the at least one channel is open to the fluid chamber and wherein at least a portion of the first surface of the second integrated circuit device is exposed within the at least one channel.

11. The integrated circuit assembly of claim 10 , wherein the substrate further includes a recess and wherein at least a portion of the first integrated circuit device resides within the recess.

12. The integrated circuit assembly of claim 10 , further including at least one heat dissipation projection extending into the fluid chamber from at least one of the second surface of the first integrated circuit device and the second surface of the second integrated circuit device.

13. The integrated circuit assembly of claim 10 , wherein the heat dissipation device comprises a main body, having a first surface and an opposing second surface, and a boundary wall extending from the first surface of the main body.

14. The integrated circuit assembly of claim 13 , wherein at least a portion of the boundary wall of the heat dissipation device is sealed to the substrate.

15. The integrated circuit assembly of claim 13 , wherein the heat dissipation device includes an input conduit extending from the second surface of the main body to the first surface of the main body, and an output port extending from the first surface of the main body to the second surface of the main body.

16. The integrated circuit assembly of claim 13 , wherein the heat dissipation device comprises a plurality of heat dissipation projections extending from the first surface of the main body of the heat dissipation device.

17. The integrated circuit assembly of claim 10 , further comprising a heat transfer fluid disposed in the heat dissipation device defining a fluid chamber of the heat dissipation device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2018
From: EID, FERAS; ELSHERBINI, ADEL; SWAN, JOHANNA
To: INTEL CORPORATION
Reel/Frame 046133/0080 →
Continuity (1)
Related Publication 20190385932A1 · Dec 19, 2019
Cited By (3)
US 12,301,290 US 12,401,109 US 12,707,972