Semiconductor devices
View Patent ↗A semiconductor device includes a substrate including an active region that extends in a first direction; a gate structure that intersects the active region and that extends in a second direction; a source/drain region on the active region on at least one side of the gate structure; a contact plug on the source/drain region on the at least one side of the gate structure; and a contact insulating layer on sidewalls of the contact plug, wherein a lower end of the contact plug is closer to the substrate than a lower end of the source/drain region.
1. A semiconductor device comprising:
a substrate having a first region and a second region, and including active regions that extend in a first direction;
gate structures respectively on the first and second regions that intersect the active regions, and that extend in a second direction;
source/drain regions on the active regions on at least one side of the gate structures and including metal-semiconductor layers in upper ends;
contact plugs on the at least one side of the gate structures, having portions of outer surfaces in contact with the source/drain regions, and having lower ends located closer to the substrate than lower ends of the source/drain regions; and
contact insulating layers on sidewalls of the contact plugs,
wherein each of the gate structures includes a gate insulating layer and a gate electrode layer stacked sequentially on the substrate, and gate spacer layers on sidewalls of the gate electrode layer in the first direction,
wherein a first distance between the gate electrode layer and each of the contact plugs adjacent to the gate electrode layer in the first region is shorter than a second distance between the gate electrode layer and each of the contact plugs adjacent to the gate electrode layer in the second region.
2. The semiconductor device according to claim 1 , wherein the contact insulating layers contact the gate spacer layers in the first direction.
3. The semiconductor device according to claim 1 , wherein lower surfaces of the contact insulating layers are in contact with the metal-semiconductor layers.
4. The semiconductor device according to claim 1 , wherein the gate spacer layers have a first thickness in the first region in the first direction, and the gate spacer layers have a second thickness in the second region in the first direction, greater than the first thickness.
5. The semiconductor device according to claim 1 , wherein the contact insulating layers have a third thickness in the first region in the first direction, and the contact insulating layers have a fourth thickness in the second region in the first direction, greater than the third thickness.
6. The semiconductor device according to claim 1 , wherein the contact plugs have a first width in the first region in the first direction, and the contact plugs have a second width in the second region in the first direction, less than the first width.
7. The semiconductor device according to claim 1 , wherein, at a boundary between the first region and the second region, the contact insulating layer in the first region contacts the contact insulating layer in the second region.
8. The semiconductor device according to claim 1 , wherein the gate electrode layer has a third width in the first region in the first direction, and the gate electrode layer has a fourth width in the second region in the first direction, greater than the third width.