Converged memory device and operation method thereof
A converged memory device includes: a first memory group having first characteristics; a second memory group having second characteristics that are different from the first characteristics; and a controller configured to migrate predetermined data of the second memory group into a cache region in the first memory group, wherein the controller is further configured to migrate data of the second memory group into the cache region by using the cache region as a buffer when an energy throttling operation is performed on the second memory group.
1. A converged memory device, comprising:
a first memory group having first characteristics;
a second memory group having second characteristics that are different from the first characteristics;
a third memory group having third characteristics that are different from the first characteristics and the second characteristics; and
a controller including a first interface for interfacing with the first memory group, a second interface for interfacing with the second memory group, and a third interface for interfacing with the third memory group,
wherein the controller is configured to migrate first predetermined data of the second memory group into a first cache region in the first memory group, and to migrate second predetermined data of the third memory group into a second cache region in the second memory group, and to monitor power of each of the first memory group, the second memory group and the third memory group,
wherein when the power monitoring result reveals that the power of a second memory in the second memory group, which is physically separated from the first memory group, is equal to or higher than a threshold value and an energy throttling operation is performed on the second memory group, the controller migrates first data of the second memory group into the first cache region through the second interface and the first interface by using the first cache region as a buffer, and
wherein when the power monitoring result reveals that the power of a third memory in the third memory group, which is physically separated from the second memory group, is equal to or higher than a threshold value and the energy throttling operation is performed on the third memory group, the controller migrates second data of the third memory group into the second cache region through the third interface and the second interface by using the second cache region as a buffer.
2. The converged memory device of claim 1 , further comprising:
a thermal sensor that is included in each of the first memory group, the second memory group, and the third memory group,
wherein the controller produces a temperature monitoring result by monitoring a temperature of each of the first memory group, the second memory group, and the third memory group with the thermal sensor, and performs the energy throttling operation based on the temperature monitoring result.
3. The converged memory device of claim 2 , wherein when the temperature monitoring result reveals that a temperature of the first cache region in the first memory group is equal to or higher than a threshold value, the controller flushes data stored in the first cache region into the second cache region and disables a use of the first cache region.
4. The converged memory device of claim 2 , wherein when the temperature monitoring result reveals that a temperature of a first memory in the first memory group is equal to or higher than a threshold value, the controller uses the first cache region as a data buffer of the first memory and stores data stored in the first memory in the first cache region.
5. The converged memory device of claim 2 , wherein when the temperature monitoring result reveals that a temperature of the second cache region in the second memory group is equal to or higher than a threshold value, the controller disables a use of the second cache region.
6. The converged memory device of claim 2 , wherein when the temperature monitoring result reveals that a temperature in a second memory in the second memory group is equal to or higher than a threshold value, the controller stores write data of the second memory in the first cache region.
7. The converged memory device of claim 2 , wherein when the temperature monitoring result reveals that a temperature of a third memory in the third memory group is equal to or higher than a threshold value, the controller stores write data of the third memory in the second cache region.
8. The converged memory device of claim 1 , wherein the controller monitors power of each of the first memory group, the second memory group, and the third memory group by monitoring at least one of a data transaction and a peak current of each of the first memory group, the second memory group, and the third memory group.
9. The converged memory device of claim 1 , wherein when the power monitoring result reveals that the power of the first cache region in the first memory group is equal to or higher than a threshold value, the controller flushes data stored in the first cache region into the second cache region and disables a use of the first cache region.
10. The converged memory device of claim 1 , wherein the first cache region includes one physical memory that is selected from among memories in the first memory group, and
the second cache region includes one physical memory that is selected from among memories in the second memory group.
11. The converged memory device of claim 1 , wherein the first cache region includes a logical memory that is formed of particular corresponding regions of memories in the first memory group, and
the second cache region includes a logical memory that is formed of particular corresponding regions of memories in the second memory group.
12. The converged memory device of claim 1 , wherein each of the first characteristics to third characteristics include at least one of storage capacity and latency.
13. The converged memory device of claim 12 , wherein the first memory group includes Dynamic Random Access Memories (DRAMs), and
the second memory group includes Phase-Change Random Access Memories (PCRAMs), and
the third memory group includes flash memories.
14. The converged memory device of claim 1 , wherein when the energy throttling operation is performed on a memory in the second memory group or a memory in the third memory group, the controller further performs an operation of controlling a data transaction in the memory on which the energy throttling operation is performed.
15. The converged memory device of claim 1 , wherein each of the first and second predetermined data includes hot data.
16. A method for operating a converged memory system including a first memory group having first characteristics, a second memory group having second characteristics that are different from the first characteristics, a third memory group having third characteristics that are different from the first characteristics and the second characteristics, and a controller including a first interface for interfacing with the first memory group, a second interface for interfacing with the second memory group, and a third interface for interfacing with the third memory group, the method comprising:
migrating first predetermined data of the second memory group into a first cache region in the first memory group;
migrating second predetermined data of the third memory group into a second cache region in the second memory group;
monitoring power of each of the first memory group, the second memory group and the third memory group;
when the power monitoring result reveals that the power of a second memory in the second memory group, which is physically separated from the first memory group, is equal to or higher than a threshold value and an energy throttling operation is performed on the second memory by using the first cache region as a buffer, migrating data of the second memory into the first cache region through the second interface and the first interface; and
when the power monitoring result reveals that the power of a third memory in the third memory group, which is physically separated from the second memory group, is equal to or higher than a threshold value and the energy throttling operation is performed on the third memory by using the second cache region as a buffer, migrating data of the third memory into the second cache region through the third interface and the second interface.
17. The method of claim 16 , further comprising:
producing a temperature monitoring result by monitoring a temperature of each of the first memory group, the second memory group, and the third memory group using a thermal sensor that is included in each of the first memory group, the second memory group, and the third memory group, and
throttling an energy of each of the first memory group, the second memory group, and the third memory group based on the temperature monitoring result.
18. The method of claim 17 , further comprising:
when the temperature monitoring result reveals that a temperature of the first cache region in the first memory group is equal to or higher than a threshold value, flushing data stored in the first cache region into the second cache region and disabling a use of the first cache region.
19. The method of claim 17 , further comprising:
when the temperature monitoring result reveals that a temperature of a first memory in the first group memories is equal to or higher than a threshold value, using the first cache region as a data buffer and storing data stored in the first memory in the first cache region.
20. The method of claim 17 , further comprising:
when the temperature monitoring result reveals that a temperature of the second cache region is equal to or higher than a threshold value, disabling a use of the second cache region.
21. The method of claim 17 , wherein the method includes:
when the temperature monitoring result reveals that a temperature of the second memory is equal to or higher than a threshold value, storing write data of the second memory in the first cache region.
22. The method of claim 17 , wherein the method includes:
when the temperature monitoring result reveals that a temperature of the third memory is equal to or higher than a threshold value, storing write data of the third memory in the second cache region.
23. The method of claim 16 , wherein the monitoring of the power of each of the first memory group, the second memory group and the third memory group includes:
monitoring the power of each of the first memory group, the second memory group, and the third memory group, and throttling energy of each of the first memory group, the second memory group, and the third memory group based on the power monitoring result.
24. The method of claim 16 , wherein the monitoring of the power of the first memory group, the second memory group and the third memory group includes:
monitoring the power of each of the first memory group, the second memory group, and the third memory group by monitoring at least one of data transaction and a peak current of each of the first memory group, the second memory group, and the third memory group.
25. The method of claim 16 , further comprising:
when the power monitoring result reveals that the power of the first cache region in the first memory group is equal to or higher than a threshold value, flushing data stored in the first cache region into the second cache region and disabling a use of the first cache region.
26. The method of claim 16 , wherein the first cache region includes one physical memory that is selected from among memories in the first memory group, and
the second cache region includes one physical memory that is selected from among memories in the second memory group.
27. The method of claim 16 , wherein the first cache region includes a logical memory that is formed of particular corresponding regions of memoires in the first memory group, and
the second cache region includes a logical memory that is formed of particular corresponding regions of memories in the second memory group.
28. The method of claim 16 , wherein each of the first characteristics to third characteristics include one or both of storage capacity and latency.
29. The method of claim 28 , wherein the first memory group includes Dynamic Random Access Memories (DRAMs), and
the second memory group includes Phase-Change Random Access Memories (PCRAMs), and
the third memory group includes flash memories.
30. The method of claim 16 , further comprising:
when the energy throttling operation is performed on the second memory or the third memory, performing an operation of throttling a data transaction characteristic of the memory on which the energy throttling operation is performed.
31. The method of claim 16 , wherein each of the first and second predetermined data includes hot data.