IP Library Granted Patent US 11,488,998
Granted Patent B2
US 11,488,998 · App. 16/853,592 · Granted Nov 1, 2022

Semiconductor apparatus and equipment

Inventors: Akihiro Kawano (Yokohama, JP); Yukinobu Suzuki (Koza-gun, JP); Takayasu Kanesada (Yamato, JP)
Assignee: CANON KABUSHIKI KAISHA
H01L27/14636H01L27/1463H01L27/14612H01L27/14621H01L27/14625H01L27/14627H01L27/14634H01L27/14643H01L27/14683H01L23/481H01L23/485H01L23/5226H01L23/53233H01L23/53238H01L24/08H01L2224/0812H01L2224/08135H01L2224/08145H01L2224/08146H01L2224/08147H01L2224/80001H01L2224/80894H01L2224/80895H01L2224/80896
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Quick Facts
Patent No.
US 11,488,998
App. No.
16/853,592
Granted
Nov 1, 2022
Kind
B2
Abstract

A semiconductor apparatus configured to decrease occurrence of exfoliation between a conductor layer and an insulator layer is provided. A first region containing silicon and copper is disposed between a first conductor portion and a first insulator portion. A second region containing silicon and copper is disposed between a second conductor portion and a second insulator portion. The first region has a maximum nitrogen concentration higher than that of the second region.

Claims (68)

1. A semiconductor apparatus comprising:

a semiconductor layer;

a substrate, the semiconductor layer and the substrate being stacked on each other;

a first conductor layer between the semiconductor layer and the substrate, the first conductor layer containing copper and including a first conductor portion;

a first insulator layer between the semiconductor layer and the substrate, the first insulator layer covering the first conductor layer and including a first insulator portion;

a second conductor layer between the semiconductor layer and the substrate, the second conductor layer containing copper and including a second conductor portion; and

a second insulator layer between the semiconductor layer and the substrate, the second insulator layer covering the second conductor layer and including a second insulator portion,

wherein a distance between the first conductor portion and the first insulator portion is smaller than a thickness of the first conductor layer,

wherein a first region containing silicon and copper is disposed between the first conductor portion and the first insulator portion,

wherein a distance between the second conductor portion and the second insulator portion is smaller than a thickness of the second conductor layer,

wherein a second region containing silicon and copper is disposed between the second conductor portion and the second insulator portion, and

wherein the first region has a maximum nitrogen concentration which is higher than that of the second region.

2. The semiconductor apparatus according to claim 1 ,

wherein the semiconductor layer has a thickness which is smaller than that of the substrate, and

wherein a distance between the substrate and the first conductor layer is smaller than that between the substrate and the second conductor layer.

3. The semiconductor apparatus according to claim 1 , wherein a distance between the semiconductor layer and the first conductor layer is greater than that between the semiconductor layer and the second conductor layer and smaller than a thickness of the semiconductor layer.

4. The semiconductor apparatus according to claim 1 , further comprising:

a third conductor layer between the semiconductor layer and the substrate, the third conductor layer containing copper and including a third conductor portion;

a third insulator layer between the semiconductor layer and the substrate, the third insulator layer covering the third conductor layer and including a third insulator portion;

a fourth conductor layer between the semiconductor layer and the substrate, the fourth conductor layer containing copper and including a fourth conductor portion; and

a fourth insulator layer between the semiconductor layer and the substrate, the fourth insulator layer covering the fourth conductor layer and including a fourth insulator portion,

wherein a distance between the substrate and the third conductor layer and a distance between the substrate and the fourth conductor layer are smaller than a distance between the substrate and the first conductor layer and a distance between the substrate and the second conductor layer,

wherein a distance between the third conductor portion and the third insulator portion is smaller than a thickness of the third conductor layer,

wherein a third region containing silicon and copper is disposed between the third conductor portion and the third insulator portion,

wherein a distance between the fourth conductor portion and the fourth insulator portion is smaller than a thickness of the fourth conductor layer,

wherein a fourth region containing silicon and copper is disposed between the fourth conductor portion and the fourth insulator portion, and

wherein the third region has a maximum nitrogen concentration which is higher than that of the fourth region.

5. The semiconductor apparatus according to claim 4 , wherein a distance between the semiconductor layer and the third conductor layer is smaller than that between the semiconductor layer and the fourth conductor layer.

6. The semiconductor apparatus according to claim 1 ,

wherein the semiconductor layer includes a first metal-oxide-semiconductor (MOS) transistor,

wherein the substrate includes a second MOS transistor, and

wherein the second MOS transistor has a gate length which is smaller than that of the first MOS transistor.

7. The semiconductor apparatus according to claim 1 , wherein the semiconductor layer includes a photoelectric conversion unit.

8. The semiconductor apparatus according to claim 1 , wherein nitrogen and silicon are bonded in the first region.

9. The semiconductor apparatus according to claim 1 , wherein copper and silicon are bonded in the first region.

10. The semiconductor apparatus according to claim 1 , wherein the first and second insulator layers contain silicon and carbon.

11. The semiconductor apparatus according to claim 1 , wherein the maximum nitrogen concentration of the first region is higher than a nitrogen concentration of the first conductor portion and a nitrogen concentration of the first insulator portion.

12. The semiconductor apparatus according to claim 1 ,

wherein the first region includes a first portion where a silicon concentration and a copper concentration are equal,

wherein the second region includes a second portion where a silicon concentration and a copper concentration are equal, and

wherein the first portion has a nitrogen concentration which is higher than that of the second portion.

13. The semiconductor apparatus according to claim 12 , wherein the nitrogen concentration of the first portion is lower than the silicon concentration and the copper concentration of the first portion.

14. The semiconductor apparatus according to claim 1 ,

wherein the maximum nitrogen concentration of the first region is 1.0 at % or more, and less than 10 at %, and

wherein the maximum nitrogen concentration of the second region is less than 1.0 at %.

15. The semiconductor apparatus according to claim 1 , wherein the second region does not contain nitrogen.

16. Equipment comprising:

the semiconductor apparatus according to claim 1 ; and

a signal processing apparatus connected to the semiconductor apparatus.

17. A semiconductor apparatus comprising:

a semiconductor substrate;

a dielectric member on the semiconductor substrate, the dielectric member being made of a silicon compound including at least either nitrogen or carbon; and

a first conductor layer between the semiconductor substrate and the dielectric member, the first conductor layer containing copper and including a first conductor portion;

a first insulator layer between the semiconductor substrate and the dielectric member, the first insulator layer covering the first conductor layer and including a first insulator portion;

a second conductor layer between the semiconductor substrate and the dielectric member, the second conductor layer containing copper and including a second conductor portion; and

a second insulator layer between the semiconductor substrate and the dielectric member, the second insulator layer covering the second conductor layer and including a second insulator portion,

wherein the dielectric member has an uneven first surface facing toward the semiconductor substrate,

wherein a second surface of the dielectric member opposite to the first surface is flatter than the first surface,

wherein a distance between the first conductor portion and the first insulator portion is smaller than a thickness of the first conductor layer, and a first region containing silicon and copper is disposed between the first conductor portion and the first insulator portion,

wherein a distance between the second conductor portion and the second insulator portion is smaller than a thickness of the second conductor layer, and a second region containing silicon and copper is disposed between the second conductor portion and the second insulator portion, and

wherein the first region has a maximum nitrogen concentration which is higher than that of the second region.

18. The semiconductor apparatus according to claim 17 ,

wherein a distance between the second surface and the first conductor layer is smaller than that between the second surface and the second conductor layer, and

wherein a difference in height of the second surface of the dielectric member is less than 1/10 of the first surface.

19. The semiconductor apparatus according to claim 17 , wherein the dielectric member includes a portion surrounded by the first insulator layer.

20. The semiconductor apparatus according to claim 17 ,

wherein the semiconductor substrate includes a photoelectric conversion unit, and

wherein the dielectric member includes a light guide portion over the photoelectric conversion unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2020
From: KAWANO, AKIHIRO; SUZUKI, YUKINOBU; KANESADA, TAKAYASU
To: CANON KABUSHIKI KAISHA
Reel/Frame 053367/0706 →
Priority Claims (1)
JP JP2019-084744 · Apr 25, 2019 · national
Continuity (1)
Related Publication 20200343293A1 · Oct 29, 2020