IP Library › Granted Patent US 11,495,454
Granted Patent B2
US 11,495,454 · App. 16/987,704 · Granted Nov 8, 2022

Deposition of low-stress boron-containing layers

Inventors: Huiyuan Wang (Santa Clara, CA); Rick Kustra (San Jose, CA); Bo Qi (San Jose, CA); Abhijit Basu Mallick (Fremont, CA); Kaushik Alayavalli (Sunnyvale, CA); Jay D. Pinson (San Jose, CA)
Assignee: Applied Materials, Inc.
H01L21/02205C23C16/32C23C16/342C23C16/345C23C16/36C23C16/401C23C16/50H01L21/0262H01L21/02274H01L21/0217H01L21/02112H01L21/02129H01L21/02208H01L21/02532H01L21/02579
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,495,454
App. No.
16/987,704
Granted
Nov 8, 2022
Kind
B2
Abstract

Examples of the present technology include semiconductor processing methods to form boron-containing materials on substrates. Exemplary processing methods may include delivering a deposition precursor that includes a boron-containing precursor to a processing region of a semiconductor processing chamber. A plasma may be formed from the deposition precursor within the processing region of the semiconductor processing chamber. The methods may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, where the substrate is characterized by a temperature of less than or about 50° C. The as-deposited boron-containing material may be characterized by a surface roughness of less than or about 2 nm, and a stress level of less-than or about −500 MPa. In some embodiments, a layer of the boron-containing material may function as a hardmask.

Claims (33)

1. A semiconductor processing method comprising:

delivering a deposition precursor comprising a boron-containing precursor to a processing region of a semiconductor processing chamber;

forming a plasma of the deposition precursor within the processing region of the semiconductor processing chamber; and

depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, wherein the substrate is characterized by a temperature of less than or about 50° C., and wherein the semiconductor processing chamber is characterized by a pressure of less than 100 mTorr.

2. The semiconductor processing method of claim 1 , wherein the method further comprises delivering an inert precursor to the processing region of the semiconductor processing chamber, wherein a flow rate ratio of the inert precursor to the deposition precursor is greater than about 10:1.

3. The semiconductor processing method of claim 2 , wherein the inert precursor comprises at least one of helium or argon.

4. The semiconductor processing method of claim 1 , wherein the semiconductor processing chamber is characterized by a pressure of less than or about 50 mTorr.

5. The semiconductor processing method of claim 1 , wherein the deposition precursor further comprises a boron-containing precursor.

6. The semiconductor processing method of claim 1 , wherein the deposition precursor further comprises at least one of a silicon-containing precursor or a nitrogen-containing precursor.

7. The semiconductor processing method of claim 1 , wherein the boron-containing material comprises at least one of boron carbide, boron-nitride, boron-carbon-nitride, boron-containing silicon, boron-containing silicon oxide, boron-and-boron-containing silicon oxide, or boron-containing silicon nitride.

8. The semiconductor processing method of claim 1 , wherein the plasma is a bias plasma formed at a bias power is greater than 2000 Watts.

9. A semiconductor processing method comprising:

delivering a deposition precursor comprising a boron-containing precursor to a processing region of a semiconductor processing chamber;

applying a bias power to a substrate disposed within the processing region of the semiconductor processing chamber, wherein the bias power is greater than or about 3000 Watts;

forming a plasma of the deposition precursor within the processing region of the semiconductor processing chamber; and

depositing a boron-containing material on the substrate.

10. The semiconductor processing method of claim 9 , wherein the substrate is characterized by a temperature of less than or about 50° C.

11. The semiconductor processing method of claim 9 , wherein the deposition precursor further comprises an inert precursor.

12. The semiconductor processing method of claim 11 , wherein a flow rate ratio of the inert precursor to the boron-containing precursor is greater than or about 10:1.

13. The semiconductor processing method of claim 9 , wherein the bias power is greater than or about 4000 Watts.

14. A semiconductor processing method comprising:

delivering a boron-containing precursor to a processing region of a semiconductor processing chamber;

forming a plasma of the boron-containing precursor within the processing region of the semiconductor processing chamber;

applying a bias power to a substrate disposed within the processing region of the semiconductor processing chamber, wherein the bias power is greater than 2000 Watts; and

depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, wherein the boron-containing material is characterized by an as-deposited surface roughness of less than or about 2 nm.

15. The semiconductor processing method of claim 14 , wherein the substrate is characterized by a temperature of less than or about 50° C.

16. The semiconductor processing method of claim 14 , wherein the semiconductor processing method further comprises:

delivering an inert precursor to the processing region of the semiconductor processing chamber, wherein a flow rate ratio of the inert precursor to the boron-containing precursor is greater than about 10:1,

wherein the bias power is greater than or about 3000 Watts.

17. The semiconductor processing method of claim 14 , wherein the boron-containing material is characterized by an as-deposited stress that is less than or about −500 MPa.

18. The semiconductor processing method of claim 14 , wherein the boron-containing material further comprises carbon atoms, and wherein greater than or about 60% of the carbon atoms have sp a hybridized bonds.

19. The semiconductor processing method of claim 14 , wherein the boron-containing material comprises less than or about 25 mol % hydrogen.

20. The semiconductor processing method of claim 14 , wherein the boron-containing material comprises at least one of boron carbide, boron-nitride, boron-carbon-nitride, boron-containing silicon, boron-containing silicon oxide, boron-and-boron-containing silicon oxide, or boron-containing silicon nitride.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2021
From: WANG, HUIYUAN; KUSTRA, RICK; QI, BO; MALLICK, ABHIJIT BASU; ALAYAVALLI, KAUSHIK; PINSON, JAY D.
To: APPLIED MATERIALS, INC.
Reel/Frame 055959/0263 →
Continuity (1)
Related Publication 20220044927A1 · Feb 10, 2022