IP Library Granted Patent US 11,508,646
Granted Patent B2
US 11,508,646 · App. 16/963,677 · Granted Nov 22, 2022

Semiconductor device

Inventor: Katsumi Miyawaki (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L23/49531H01L23/3107H01L23/49503H01L23/49534H01L23/49586H01L23/66
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Quick Facts
Patent No.
US 11,508,646
App. No.
16/963,677
Granted
Nov 22, 2022
Kind
B2
Abstract

A semiconductor device comprises; a lead frame having leads and a die pad; a printed circuit board including an electrode for the connection of each of the leads and the die pad, a wiring pattern, and an opening exposing a part of a surface of the die pad; the semiconductor element for processing a high frequency signal, mounted on a surface of a metal block bonded to the surface of the die pad exposed through the opening, and connected to the wiring pattern with a metal wire; electronic components connected to the wiring pattern and mounted on a surface of the printed circuit board; and a sealing resin to seal the printed circuit board, the semiconductor element, the electronic components, and the metal wire so as to expose rear surfaces of the leads and the die pad.

Claims (33)

1. A semiconductor device equipped with a semiconductor element for processing a high frequency signal, comprising:

a lead frame having leads and a die pad;

a printed circuit board including an electrode for a connection of each of the leads and the die pad, a wiring pattern, and an opening exposing a part of a surface of the die pad;

the semiconductor element mounted on the surface of the die pad exposed through the opening or mounted on a surface of a metal block bonded to the surface of the die pad exposed through the opening, and connected to the wiring pattern with a metal wire, the surface of the metal block being opposite to a surface facing the die pad;

electronic components connected to the wiring pattern and mounted on a surface of the printed circuit board opposite to a surface thereof facing the lead frame; and

a sealing resin to seal the printed circuit board, the semiconductor element, the electronic components, and the metal wire so as to expose rear surfaces of the leads and the die pad opposite to surfaces facing the printed circuit board, wherein

the printed circuit board has through holes provided around the leads on an outer periphery thereof in which the wiring pattern is not formed so as to allow air, if present in the sealing resin, to be released through the through holes.

2. A semiconductor device equipped with a semiconductor element for processing a high frequency signal, comprising:

a lead frame having leads and a die pad;

a printed circuit board including an electrode for a connection of each of the leads and the die pad, a wiring pattern, and an opening exposing a part of a surface of the die pad;

the semiconductor element mounted on the surface of the die pad exposed through the opening or mounted on a surface of a metal block bonded to the surface of the die pad exposed through the opening, and connected to the wiring pattern with a metal wire, the surface of the metal block being opposite to a surface facing the die pad;

electronic components connected to the wiring pattern and mounted on a surface of the printed circuit board opposite to a surface thereof facing the lead frame; and

a sealing resin to seal the printed circuit board, the semiconductor element, the electronic components, and the metal wire so as to expose rear surfaces of the leads and the die pad opposite to surfaces facing the printed circuit board, wherein

the printed circuit board has concave portions provided around the leads on an outer periphery thereof in which the wiring pattern is not formed so as to allow air, if present in the sealing resin, to be released through the concave portions.

3. The semiconductor device according to claim 1 , wherein the semiconductor element is mounted on the surface of the metal block that is opposite to the surface facing the die pad and that is exposed through the opening, and a height difference between the surface of the metal block on which the semiconductor element is mounted and a metal wire connection surface in the printed circuit board in which the metal wire connected to the semiconductor element is connected is ½ or less of a height of the printed circuit board.

4. The semiconductor device according to claim 1 , wherein the printed circuit board is a multilayer substrate in which a plurality of basic substrates each with the wiring pattern being formed are stacked;

the opening is such that an opening area of a lowermost basic substrate being one of the basic substrates on a side closer to a mounting surface on which the semiconductor element is mounted is formed to be smaller than an opening area of an uppermost basic substrate being one of the basic substrates farthest from the semiconductor element; and

the semiconductor element is connected to the wiring pattern formed on a surface opposite to a surface facing the die pad in one of the basic substrates except for the uppermost basic substrate by the metal wire.

5. The semiconductor device according to claim 4 , wherein, in the printed circuit board, the opening is covered with a lid on the uppermost basic substrate, and the semiconductor element is disposed in a hollow part formed by the die pad, the lid, and the opening.

6. The semiconductor device according to claim 1 , wherein a basic material of the printed circuit board is a ceramic base material.

7. The semiconductor device according to claim 1 , wherein a basic material of the printed circuit board is a resin base material.

8. The semiconductor device according to claim 2 , wherein the semiconductor element is mounted on the surface of the metal block that is opposite to the surface facing the die pad and that is exposed through the opening, and a height difference between the surface of the metal block on which the semiconductor element is mounted and a metal wire connection surface in the printed circuit board in which the metal wire connected to the semiconductor element is connected is ½ or less of a height of the printed circuit board.

9. The semiconductor device according to claim 2 , wherein the printed circuit board is a multilayer substrate in which a plurality of basic substrates each with the wiring pattern being formed are stacked;

the opening is such that an opening area of a lowermost basic substrate being one of the basic substrates on a side closer to a mounting surface on which the semiconductor element is mounted is formed to be smaller than an opening area of an uppermost basic substrate being one of the basic substrates farthest from the semiconductor element; and

the semiconductor element is connected to the wiring pattern formed on a surface opposite to a surface facing the die pad in one of the basic substrates except for the uppermost basic substrate by the metal wire.

10. The semiconductor device according to claim 2 , wherein a basic material of the printed circuit board is a ceramic base material.

11. The semiconductor device according to claim 3 , wherein a basic material of the printed circuit board is a ceramic base material.

12. The semiconductor device according to claim 4 , wherein a basic material of the printed circuit board is a ceramic base material.

13. The semiconductor device according to claim 5 , wherein a basic material of the printed circuit board is a ceramic base material.

14. The semiconductor device according to claim 2 , wherein a basic material of the printed circuit board is a resin base material.

15. The semiconductor device according to claim 3 , wherein a basic material of the printed circuit board is a resin base material.

16. The semiconductor device according to claim 4 , wherein a basic material of the printed circuit board is a resin base material.

17. The semiconductor device according to claim 5 , wherein a basic material of the printed circuit board is a resin base material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2020
From: MIYAWAKI, KATSUMI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 053267/0350 →
Continuity (1)
Related Publication 20210074612A1 · Mar 11, 2021