Semiconductor device
View Patent ↗A semiconductor device with a novel structure which can identify the sound source is provided. The semiconductor device includes a microphone array, delay circuits, and a signal processing circuit. The delay circuit includes a first selection circuit, which selects a microphone, signal retention circuits, which retain voltages depending on the sound signal, and a second selection circuit, which selects a signal retention circuit. Each signal retention circuit includes a transistor which includes a semiconductor layer including an oxide semiconductor in its channel formation region. The first selection circuit writes the voltage of discreet sound signals to the signal retention circuit. The second selection circuit selects at different timings the voltages which are retained in the signal retention circuit and generates the output signal corresponding to the delayed sound signal.
1. A semiconductor device comprising:
a first microphone and a second microphone;
a first selection circuit configured to select one of the first microphone and the second microphone and comprising a first transistor;
a first signal retention circuit configured to obtain a plurality of first sound signals from the first microphone at different timings and to retain a plurality of first voltages depending on the plurality of first sound signals and comprising a second transistor;
a second signal retention circuit configured to obtain a plurality of second sound signals from the second microphone at different timings and to retain a plurality of second voltages depending on the plurality of second sound signals;
a second selection circuit configured to select one of the plurality of first voltages and one of the plurality of second voltages and comprising a third transistor; and
a signal processing circuit to which the one of the plurality of first voltages and the one of the plurality of second voltages are input,
wherein the second selection circuit is configured to generate a signal delayed from one of the plurality of first sound signals and the plurality of second sound signals,
wherein the one of the first microphone and the second microphone is electrically connected to one of a source and a drain of the first transistor,
wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor, and
wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor.
2. The semiconductor device according to claim 1 ,
wherein the signal processing circuit comprises a differential circuit, an integrator circuit, a comparator, and a triangle-wave-generator circuit,
wherein the one of the plurality of first voltages and the one of the plurality of second voltages are input to the differential circuit,
wherein an output signal from the differential circuit is input to the integrator circuit, and
wherein an output signal from the integrator circuit and an output signal from the triangle-wave-generator circuit are input to the comparator.
3. The semiconductor device according to claim 2 ,
wherein the differential circuit comprises a fourth transistor, and
wherein the fourth transistor comprises a semiconductor layer comprising an oxide semiconductor in a channel formation region.
4. The semiconductor device according to claim 1 ,
wherein the first selection circuit is a demultiplexer, and
wherein the second selection circuit is a multiplexer.
5. A semiconductor device comprising:
a first microphone and a second microphone;
a first selection circuit configured to select one of the first microphone and the second microphone and comprising a first transistor;
a first signal retention circuit configured to obtain a plurality of first sound signals from the first microphone at different timings and to retain a plurality of first voltages depending on the plurality of first sound signals and comprising a second transistor;
a second signal retention circuit configured to obtain a plurality of second sound signals from the second microphone at different timings and to retain a plurality of second voltages depending on the plurality of second sound signals;
a second selection circuit configured to select one of the plurality of first voltages and one of the plurality of second voltages and comprising a third transistor; and
a signal processing circuit to which the one of the plurality of first voltages and the one of the plurality of second voltages are input,
wherein the second selection circuit is configured to generate a signal delayed from one of the plurality of first sound signals and the plurality of second sound signals signals,
wherein the one of the first microphone and the second microphone is electrically connected to one of a source and a drain of the first transistor,
wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,
wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, and
wherein each of the first transistor, the second transistor, and the third transistor comprises a semiconductor layer comprising an oxide semiconductor in a channel formation region.
6. The semiconductor device according to claim 5 ,
wherein the signal processing circuit comprises a differential circuit, an integrator circuit, a comparator, and a triangle-wave-generator circuit,
wherein the one of the plurality of first voltages and the one of the plurality of second voltages are input to the differential circuit,
wherein an output signal from the differential circuit is input to the integrator circuit, and
wherein an output signal from the integrator circuit and an output signal from the triangle-wave-generator circuit are input to the comparator.
7. The semiconductor device according to claim 5 ,
wherein the first selection circuit is a demultiplexer, and
wherein the second selection circuit is a multiplexer.
8. The semiconductor device according to claim 6 ,
wherein the differential circuit comprises a fourth transistor, and
wherein the fourth transistor comprises a semiconductor layer comprising an oxide semiconductor in a channel formation region.