IP Library Granted Patent US 11,520,517
Granted Patent B2
US 11,520,517 · App. 16/804,105 · Granted Dec 6, 2022

Data logging sub-system for memory sub-system controller

Inventor: Michael Richard Spica (Eagle, ID)
Assignee: Micron Technology, Inc.
G06F3/0653G06F3/0604G06F3/0673
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Quick Facts
Patent No.
US 11,520,517
App. No.
16/804,105
Granted
Dec 6, 2022
Kind
B2
Abstract

Data traffic comprising data packets communicated between a memory sub-system and a host system is monitored by a processing device at the memory sub-system. Data packets are classified according to packet type. Log data comprising a frequency and latency information associated with each packet type is generated. The log data is stored in a memory component of the memory sub-system.

Claims (75)

1. A memory sub-system comprising:

a memory component comprising a log data store; and

a processing device coupled to the memory component, the processing device comprising:

a first hardware counter designated for counting transaction layer packets (TLPs);

a second hardware counter designated for counting data link layer packets (DLLPs);

a multiplexer to send packets to the first hardware counter and the second hardware counter;

the processing device to perform operations comprising:

monitoring data traffic over a communication channel of a physical host interface over a time interval, the data traffic comprising data packets communicated between the memory sub-system and a host system via the communication channel of the physical host interface;

classifying each data packet in the data traffic according to packet type;

sending, by the multiplexer, at least one packet classified as a TLP to the first hardware counter;

sending, by the multiplexer, at least one packet classified as a DLLP to the second hardware counter;

generating log data comprising a frequency of each packet type in the data traffic and latency information associated with each packet type, the generating of log data comprising:

counting, by the first hardware counter, a number of TLPs communicated over the communication channel over the time interval; and

determining a frequency of TLPs in the data traffic based on the number of TLPs communicated over the communication channel over the time interval; and

storing the log data in the log data store.

2. The memory sub-system of claim 1 , wherein:

the classifying of each data packet comprises determining a data packet type of data packet based on a packet type indicator included in the data packet.

3. The memory sub-system of claim 1 , wherein:

the generating of the log data further comprises:

counting, by the second hardware counter, a number of DLLPs communicated over the communication channel over the time interval; and

determining a frequency of DLLPs in the data traffic based on the number of DLPs communicated over the communication channel over the time interval.

4. The memory sub-system of claim 3 , wherein:

monitoring the data traffic includes monitoring incoming and outgoing data packets; and

classifying each data packet in the data traffic comprises classifying one or more incoming data packets and one or more outgoing data packets according to packet type.

5. The memory sub-system of claim 1 , wherein the processing device further comprises a timer to measure the time interval.

6. The memory sub-system of claim 1 , wherein the generating of the log data comprises:

determining the latency information associated with TLPs, the latency information including summary statistics associated with packet latency.

7. The memory sub-system of claim 6 , wherein the determining of the latency information associated TLPs comprises:

measuring a latency of each TLP;

determining a minimum latency of TLPs type;

determining a maximum latency of TLPs; and

determining an average latency of TLPs.

8. The memory sub-system of claim 7 , wherein the measuring the latency of each TLP comprises:

measuring a latency of a first TLP based on a number of clock cycles between the first data packet and a second TLP being communicated over the communication channel.

9. The memory sub-system of claim 1 , wherein the communication channel is one of: a receiver channel or a transmitter channel of the host interface.

10. The memory sub-system of claim 1 , wherein the host interface comprises one of: a peripheral component interconnect express (PCIe), a Universal Flash Storage (UFS) communication channel, or a Serial Advanced Technology Attachment (SATA) communication channel.

11. A method comprising:

monitoring, by a memory sub-system controller, data traffic over a communication channel of a physical host interface over a time interval, the data traffic comprising data packets communicated between a memory sub-system and a host system via the communication channel of the physical interface, the memory sub-system controller comprising:

a first hardware counter designated for counting transaction layer packets (TLPs);

a second hardware counter designated for counting data link layer packets (DLLPs);

a multiplexer to send packets to the first hardware counter and the second hardware;

classifying, by the memory sub-system controller, each data packet in the data traffic according to packet type;

sending, by the multiplexer of the memory sub-system controller, at least one packet classified as a TLP to the first hardware counter;

sending, by the multiplexer of the memory sub-system controller, at least one packet classified as a DLLP to the second hardware counter;

generating, by the memory sub-system controller, log data comprising a frequency of each packet type in the data traffic and latency information associated with each packet type, the generating of log data comprising:

counting, by the first hardware counter, a number of TLPs communicated over the communication channel over the time interval; and

determining a frequency of TLPs in the data traffic based on the number of TLPs communicated over the communication channel over the time interval; and

storing the log data in a log data store of the memory sub-system.

12. The method of claim 11 , wherein the classifying of each data packet comprises determining a data packet type of data packet based on a packet type indicator included in the data packet.

13. The method of claim 11 , wherein the generating of the log data comprises:

counting, by second hardware counter, a number of DLLPs communicated over the communication channel over the time interval; and

determining a frequency of DLLPs in the data traffic based on the number of DLLPs communicated over the communication channel over the time interval.

14. The method of claim 12 , wherein the generating of the log data comprises:

determining the latency information associated with TLPs, the latency information including summary statistics associated with packet latency.

15. The method of claim 14 , wherein the determining of the latency information associated with TLPs comprises:

measuring a latency of each data packet of TLPs;

determining a minimum latency of TLPs;

determining a maximum latency of TLPs; and

determining an average latency of TLPs.

16. The method of claim 14 , wherein measuring a latency of each data packet of the first packet type comprises:

measuring latency of a data packet based on a number of clock cycles in which no data packets are communicated over the communication prior to or after communicating the data packet over the communication channel.

17. The method of claim 11 , wherein the communication channel is one of: a receiver channel or a transmitter channel of the host interface.

18. The method of claim 11 , wherein the host interface comprises one of: a peripheral component interconnect express (PCIe), a Universal Flash Storage (UFS) communication channel, or a Serial Advanced Technology Attachment (SATA) communication channel.

19. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, configures the processing device to perform operations comprising:

monitoring data traffic over a communication channel of a physical host interface over a time interval, the data traffic comprising data packets communicated between a memory sub-system and a host system via the communication channel of the physical host interface;

classifying each data packet in the data traffic according to packet type;

providing at least one signal to a multiplexer that causes the multiplexer to send at least one packet classified as a transaction layer packet (TLP) to a first hardware counter designated for counting TLPs;

providing at least one signal to the multiplexer that causes the multiplexer to send at least one packet classified as a data link layer packet (DLLP) to a second hardware counter designated for counting DLLPs;

generating log data comprising a frequency of each packet type in the data traffic and latency information associated with each packet type, the generating of log data comprising:

counting, by the first hardware counter, a number of TLPs communicated over the communication channel over the time interval; and

determining a frequency of TLPs in the data traffic based on the number of TLPs communicated over the communication channel over the time interval; and

storing the log data in a log data store.

20. The non-transitory computer-readable storage medium of claim 19 , wherein the instructions further configured the processing device to perform operations:

counting, by the second hardware counter, a number of DLLPs communicated over the communication channel over the time interval; and

determining a frequency of DLLPs in the data traffic based on the number of DLLPs communicated over the communication channel over the time interval.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2020
From: SPICA, MICHAEL RICHARD
To: MICRON TECHNOLOGY, INC.
Reel/Frame 052407/0050 →
Continuity (1)
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