Secure public cloud using extended paging and memory integrity
A host Virtual Machine Monitor (VMM) operates “blindly,” without the host VMM having the ability to access data within a guest virtual machine (VM) or the ability to access directly control structures that control execution flow of the guest VM. Guest VMs execute within a protected region of memory (called a key domain) that even the host VMM cannot access. Virtualization data structures that pertain to the execution state (e.g., a Virtual Machine Control Structure (VMCS)) and memory mappings (e.g., Extended Page Tables (EPTs)) of the guest VM are also located in the protected memory region and are also encrypted with the key domain key. The host VMM and other guest VMs, which do not possess the key domain key for other key domains, cannot directly modify these control structures nor access the protected memory region. The host VMM, however, using VMPageIn and VMPageOut instructions, can build virtual machines in key domains and page VM pages in and out of key domains.
1. A processor comprising:
a hardware core, including an instruction decoder to decode a create key domain instruction and a virtual machine (VM) page-in instruction, wherein the create key domain instruction is to specify an encrypted client key;
wherein the hardware core is to perform operations corresponding to the create key domain instruction, including to create a key domain in which to execute a first VM, and wherein the hardware core is also to perform operations corresponding to the VM page-in instruction, including paging a first VM guest page into the key domain, wherein paging the first VM guest page into the key domain includes verifying the first VM guest page using a message authentication code (MAC) stored in an extended page table entry (EPTE) for the first VM guest page and replacing the MAC in the EPTE with a host physical address of the first VM guest page; and
an encryption engine to decrypt the first VM guest page using the client key responsive to the VM page-in instruction.
2. The processor of claim 1 , wherein:
the hardware core is also to execute a VM page-out instruction to page the first VM guest page out of the key domain; and
the encryption engine is also to encrypt the first VM guest page responsive to the VM page-out instruction.
3. The processor of claim 1 , wherein the key domain is to include a plurality of protected memory locations to store a plurality of VM guest pages, including the first VM guest page.
4. The processor of claim 3 , wherein execution of the create key domain instruction includes decrypting an encrypted key domain key to provide to the encryption engine for decrypting the plurality of VM guest pages.
5. The processor of claim 1 , wherein the VM page-in instruction is to specify a first guest physical address to indicate a start of a guest physical address range for the first VM.
6. The processor of claim 5 , wherein the VM page-in instruction is to specify a second guest physical address to indicate an end of the guest physical address range for the first VM.
7. The processor of claim 3 , wherein the VM page-in instruction is to specify a host physical address of a first protected memory location to store the first VM guest page.
8. The processor of claim 7 , wherein the VM page-in instruction is to specify permissions for accessing the first protected memory location.
9. The processor of claim 2 , wherein the VM page-out instruction is to specify a first guest physical address to indicate a start of a guest physical address range for the first VM and a second guest physical address to indicate an end of the guest physical address range for the first VM.
10. The processor of claim 9 , wherein the VM page-out instruction is to specify permissions for accessing the first VM guest page.