IP Library Granted Patent US 11,521,963
Granted Patent B2
US 11,521,963 · App. 16/937,825 · Granted Dec 6, 2022

Semiconductor storage device

Inventor: Takehiro Nakai (Yokkaichi Mie, JP)
Assignee: KIOXIA CORPORATION
H01L27/0296H01L27/0288G11C16/0483G11C16/08G11C16/26H01L27/115
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Quick Facts
Patent No.
US 11,521,963
App. No.
16/937,825
Granted
Dec 6, 2022
Kind
B2
Abstract

A semiconductor storage device includes a circuit region formed on a semiconductor substrate, and a guard ring region spaced from one side of the circuit region by a predetermined distance. The guard ring region extends in a first direction, the first direction being a direction in which the one side of the circuit region extends, includes a guard ring line, an element isolation region, a first defect trapping layer, a second defect trapping layer. The first defect trapping layer extends from a boundary location between the circuit region and the element isolation region to a location spaced from a boundary location between the element isolation region and the guard ring line by an offset distance toward the element isolation region in the second direction.

Claims (35)

1. A semiconductor storage device, comprising:

a circuit region formed on a semiconductor substrate; and

a guard ring region spaced from the circuit region,

wherein the guard ring region includes:

a guard ring line,

wherein the guard ring line includes a plurality of guard ring patterns over a surface of the semiconductor substrate, each of the plurality of guard ring patterns include a first line segment extending in a first direction, a second line segment extending from a first end of the first line segment in a second direction orthogonal to the first direction, and a third line segment extending from a second end of the first line segment in the second direction,

wherein in a first one and a second one of the plurality of guard ring patterns adjacent to each other, the second line segment of the first guard ring pattern is connected to the third line segment of the second guard ring pattern by a fourth line segment extending in the second direction;

an element isolation region, formed of an insulating material between the circuit region and the guard ring region, that extends into the semiconductor substrate to a first depth;

a first defect trapping layer, which is a highly distorted layer, formed below the element isolation region; and

a second defect trapping layer, which is a highly distorted layer, formed along a boundary between the element isolation region and the circuit region, the second defect trapping layer extending into the semiconductor substrate to a second depth equal to the first depth, wherein

the first and second defect trapping layers contain impurities implanted in a high concentration or include a first material different from a second material of the semiconductor substrate, and

the first defect trapping layer extends from a first location between the circuit region and the element isolation region to a second location spaced from a boundary between the element isolation region and the guard ring region by an offset distance toward the circuit region in the second direction.

2. The semiconductor storage device according to claim 1 , wherein

the fourth line segment connects one end of the second line segment of the first guard ring pattern, which is not connected to the first line segment of the first guard ring pattern, to one end of the third line segment of the second guard ring pattern, which is not connected to the first line segment of the second guard ring pattern.

3. The semiconductor storage device according to claim 1 , wherein

the guard ring line has a meander-shaped planar shape.

4. The semiconductor storage device according to claim 1 , wherein

the first line segment extends in the first direction from a first connection part at an intersection of the first line segment and the second line segment, and the second line segment extends in the first and second directions from the first connection part,

the first line segment extends in the first direction from a second connection part at an intersection of the first line segment and the third line segment, and the third line segment extends in the second direction from the second connection part,

the fourth line segment extends in the first direction from a third connection part at an intersection of the fourth line segment and the second line segment, and the second line segment extends in the first and second directions from the third connection part, and

the fourth line segment extends in the first direction from a fourth connection part at an intersection of the fourth line segment and the third line segment, and the third line segment extends in the second direction from the fourth connection part.

5. The semiconductor storage device according to claim 1 , wherein

the fourth line segment connects one end of the second line segment of the first guard ring pattern, which is connected to the first line segment of the first guard ring pattern, to one end of the third line segment of the second guard ring pattern, which is connected to the first line segment of the second guard ring pattern.

6. The semiconductor storage device according to claim 1 , wherein

the guard ring line has a comb-shaped planar shape.

7. The semiconductor storage device according to claim 1 , wherein

the offset distance is equal to or greater than a width of the first line segment extending in the second direction.

8. The semiconductor storage device according to claim 1 , wherein

the impurities include at least one of carbon or oxygen.

9. The semiconductor storage device according to claim 1 , wherein

the impurities include boron.

10. The semiconductor storage device according to claim 9 , wherein

the second defect trapping layer is formed along the boundary location between the element isolation region and the circuit region, and the second defect trapping layer is formed at least near a third connection part at an intersection of the fourth line segment and the second line segment and a fourth connection part at an intersection of the fourth line segment and the third line segment.

11. The semiconductor storage device according to claim 1 , wherein

the first material includes at least one of polycrystalline silicon, silicon oxide, or silicon nitride.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2020
From: NAKAI, TAKEHIRO
To: KIOXIA CORPORATION
Reel/Frame 053301/0656 →
Priority Claims (1)
JP JP2019-166229 · Sep 12, 2019 · national
Continuity (1)
Related Publication 20210082908A1 · Mar 18, 2021