Schottky diode structures and integration with III-V transistors
Embodiments herein describe techniques, systems, and method for a semiconductor device. Embodiments herein may present a semiconductor device having a channel area including a channel III-V material, and a source area including a first portion and a second portion of the source area. The first portion of the source area includes a first III-V material, and the second portion of the source area includes a second III-V material. The channel III-V material, the first III-V material and the second III-V material may have a same lattice constant. Moreover, the first III-V material has a first bandgap, and the second III-V material has a second bandgap, the channel III-V material has a channel III-V material bandgap, where the channel material bandgap, the second bandgap, and the first bandgap form a monotonic sequence of bandgaps. Other embodiments may be described and/or claimed.
1. A semiconductor device, comprising:
a Schottky stack including a first layer above a substrate, and a second layer above the first layer, wherein the first layer includes an III-V material, and the second layer is a polarization layer;
a Schottky anode in contact with the second layer to form a Schottky barrier at an interface between the Schottky anode and the second layer of the Schottky stack;
a cathode through the second layer of the Schottky stack and extending into the first layer of the Schottky stack, wherein a current is to flow from the Schottky anode through the Schottky barrier in a vertical direction orthogonal to a surface of the substrate, and vertically through the second layer to the first layer of the Schottky stack, following the first layer of the Schottky stack in a horizontal direction to the cathode;
a channel base including a layer of III-V material above the substrate, wherein the Schottky stack is above the channel base; and
an III-V transistor including a channel stack above the channel base, wherein the channel stack includes a layer of III-V material in the channel stack, and a polarization layer above the layer of III-V material in the channel stack.
2. The semiconductor device of claim 1 , wherein the Schottky anode is partially embedded into the second layer of the Schottky stack.
3. The semiconductor device of claim 1 , wherein the second layer of the Schottky stack includes a material selected from the group consisting of AlInGaN, Al x In y Ga 1-x-y N, and AlN.
4. The semiconductor device of claim 1 , wherein the first layer of the Schottky stack includes n-type dopant.
5. The semiconductor device of claim 1 , wherein the III-V material of the first layer of the Schottky stack includes a material selected from the group consisting of indium (In), phosphorus (P), gallium (Ga), or arsenic (As), Ge, SiGe, GaAs, In x Ga 1-x As, In x Ga 1-x N where x is between 0 and 1, InSb, GaN, InAs, GaP, InGaP, and InP.
6. The semiconductor device of claim 1 , wherein the Schottky anode or cathode includes a material selected from the group consisting of titanium (Ti), molybdenum (Mo), gold (Au), platinum (Pt), aluminum (Al), nickel (Ni), copper (Cu), chromium (Cr), and an alloy of Ti, Mo, Au, Pt, Al Ni, Cu, Cr, TiAlN, HfAlN, or InAlO.
7. The semiconductor device of claim 1 , wherein the substrate includes a material selected from the group consisting of silicon, sapphire, SiC, GaN, and AlN.
8. The semiconductor device of claim 1 , wherein the substrate is a silicon substrate with a (111), (100), or (110) crystal plane as a principal plane.
9. The semiconductor device of claim 1 , wherein the Schottky stack further includes a third layer with an III-V material, the third layer of the Schottky stack is between the first layer and the second layer of the Schottky stack, and the cathode is through the third layer of the Schottky stack and in contact with the first layer of the Schottky stack.
10. The semiconductor device of claim 1 , wherein the cathode is a first cathode, and the semiconductor device further includes a second cathode through the second layer of the Schottky stack and in contact with the first layer of the Schottky stack, a current is to flow from the Schottky anode through the Schottky barrier in the vertical direction orthogonal to the surface of the substrate, and vertically through the second layer to the first layer of the Schottky stack, following the first layer of the Schottky stack in a horizontal direction to the second cathode.
11. The semiconductor device of claim 1 , further comprising:
a spacer adjacent to a sidewall of the Schottky anode and above the Schottky stack.
12. The semiconductor device of claim 1 , further comprising:
a buffer layer or a nucleation layer between the substrate and the channel base.
13. A computing device, comprising:
a processor; and
a memory device coupled to the processor, wherein the memory device or the processor includes a Schottky diode comprising:
a Schottky stack including a first layer above a substrate, and a second layer above the first layer, wherein the first layer includes an III-V material, and the second layer is a polarization layer;
a Schottky anode in contact with the second layer to form a Schottky barrier at an interface between the Schottky anode and the second layer of the Schottky stack; and
a cathode through the second layer of the Schottky stack and extending into the first layer of the Schottky stack, wherein a current is to flow from the Schottky anode through the Schottky barrier in a vertical direction orthogonal to a surface of the substrate, and vertically through the second layer to the first layer of the Schottky stack, following the first layer of the Schottky stack in a horizontal direction to the cathode, and wherein the memory device or the processor includes comprising:
a channel base including a layer of III-V material above the substrate, wherein the Schottky stack is above the channel base; and
a channel stack above the channel base, wherein the channel stack includes a layer of III-V material in the channel stack, and a polarization layer above the layer of III-V material in the channel stack.
14. The computing device of claim 13 , wherein the first layer of the Schottky stack includes n-type dopant, and the III-V material of the first layer of the Schottky stack includes a material selected from the group consisting of indium (In), phosphorus (P), gallium (Ga), or arsenic (As), Ge, SiGe, GaAs, In x Ga 1-x As, In x Ga 1-x N where x is between 0 and 1, InSb, GaN, InAs, GaP, InGaP, and InP.
15. The computing device of claim 13 , wherein the computing device is a device selected from the group consisting of a wearable device or a mobile computing device, the wearable device or the mobile computing device including one or more of an antenna, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, a Geiger counter, an accelerometer, a gyroscope, a speaker, and a camera coupled with the processor.
16. A semiconductor device, comprising:
a Schottky stack including a first layer above a substrate, and a second layer above the first layer, wherein the first layer includes an III-V material, and the second layer is a polarization layer;
a Schottky anode in contact with the second layer to form a Schottky barrier at an interface between the Schottky anode and the second layer of the Schottky stack; and
a cathode through the second layer of the Schottky stack and in contact with the first layer of the Schottky stack, wherein a current is to flow from the Schottky anode through the Schottky barrier in a vertical direction orthogonal to a surface of the substrate, and vertically through the second layer to the first layer of the Schottky stack, following the first layer of the Schottky stack in a horizontal direction to the cathode, wherein the cathode is a first cathode, and the semiconductor device further includes a second cathode through the second layer of the Schottky stack and in contact with the first layer of the Schottky stack, a current is to flow from the Schottky anode through the Schottky barrier in the vertical direction orthogonal to the surface of the substrate, and vertically through the second layer to the first layer of the Schottky stack, following the first layer of the Schottky stack in a horizontal direction to the second cathode.