IP Library › Granted Patent US 11,526,298
Granted Patent B2
US 11,526,298 · App. 17/181,367 · Granted Dec 13, 2022

Apparatus and method for controlling a read voltage in a memory system

Inventor: Dae Sung Kim (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F3/0655G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 11,526,298
App. No.
17/181,367
Granted
Dec 13, 2022
Kind
B2
Abstract

A memory system determines a level of a read voltage, which is used for reading or recognizing data stored in non-volatile memory cells, in response to a change of a threshold voltage distribution which gradually widens due to charge loss or charge transfer in the non-volatile memory cells over time, so that it is possible to provide an apparatus and method which can avoid or reduce an error in a read operation.

Claims (63)

1. A memory system, comprising:

a memory device including a plurality of non-volatile memory cells; and

a controller coupled to the memory device via a data path and configured to:

obtain at least some of plural threshold voltage distributions corresponding to data which is stored in the plurality of non-volatile memory cells and transferred via the data path,

determine a mean difference and a standard deviation ratio of the plural threshold voltage distributions,

determine a read voltage level, which is used for recognizing the data, based on the mean difference and the standard deviation ratio, and

control the memory device for performing a read operation on at least some of the plurality of non-volatile memory cells based on the read voltage level,

wherein the controller is configured to determine whether the standard deviation ratio is less than a preset threshold value, and, when the standard deviation ratio is greater than the preset threshold value, shift the read voltage level in a direction of a mean of a threshold voltage distribution which has a smaller standard deviation between the plural threshold voltage distributions to determine the read voltage level.

2. The memory system according to claim 1 ,

wherein each of the plurality of non-volatile memory cells stores multi-bit data, and

wherein the plurality of threshold voltage distributions includes two threshold voltage distributions corresponding to two adjacent values of the multi-bit data.

3. The memory system according to claim 1 ,

wherein the mean difference is a difference between mean values of the plural threshold voltage distributions, and

wherein the controller is configured to determine the read voltage level based on a standardized value obtained by dividing a difference between a previous read voltage level and the mean difference by a standard deviation regarding one of the plural threshold voltage distributions.

4. The memory system according to claim 3 , wherein the controller is configured to, when the standard deviation ratio is greater than the preset threshold value, determine the read voltage level by a procedure of:

subtracting a bias voltage level corresponding to a boundary value of a lowest section between the plural threshold voltage distributions from the previous read voltage level to obtain a subtracted value;

dividing the subtracted value by the standard deviation regarding the one of the plural threshold voltage distributions to obtain a divided value; and

adding the boundary value to a value obtained by multiplying the divided value by the standard deviation ratio, a result of the adding being the read voltage level.

5. The memory system according to 1 , wherein the controller is configured to, when the standard deviation ratio is equal to or less than the preset threshold value, determine the read voltage level based on the mean difference.

6. The memory system according to claim 1 , wherein the controller is configured to, when the standard deviation ratio is equal to or less than the preset threshold value, determine the read voltage level which corresponds to a level, at which a number of non-volatile memory cells is minimum in a sum of the plural threshold voltage distributions.

7. The memory system according to claim 1 , wherein the controller is configured to obtain the plural threshold voltage distributions by:

applying plural candidate read voltages having different levels to the plurality of non-volatile memory cells to distinguish the data of adjacent values, and

determining the plural threshold voltage distributions based on numbers of the plurality of non-volatile memory cells storing the data of adjacent values.

8. A method for controlling a memory system comprising a memory device coupled via a data path, the method comprising:

obtaining at least some of plural threshold voltage distributions corresponding to data which is stored in a plurality of non-volatile memory cells in the memory device and transferred via the data path;

determining a mean difference and a standard deviation ratio of the plural threshold voltage distributions;

determining a read voltage level, which is used for recognizing the data, based on the mean difference and the standard deviation ratio by determining whether the standard deviation ratio is less than a preset threshold value, and, when the standard deviation ratio is greater than the preset threshold value, shifting the read voltage level in a direction of a mean of a threshold voltage distribution which has a smaller standard deviation between the plural threshold voltage distributions; and

controlling the memory device for performing a read operation on at least some of the plurality of non-volatile memory cells based on the read voltage level.

9. The method according to claim 8 ,

wherein each of the plurality of non-volatile memory cells stores multi-bit data, and

wherein the plurality of threshold voltage distributions includes two threshold voltage distributions corresponding to two adjacent values of the multi-bit data.

10. The method according to claim 8 ,

wherein the mean difference is a difference between mean values of the plural threshold voltage distributions, and

wherein the read voltage level is determined based on a standardized value obtained by dividing a difference between a previous read voltage level and the mean difference by a standard deviation regarding one of the plural threshold voltage distributions.

11. The method according to claim 10 , wherein the determining of the read voltage level includes, when the standard deviation ratio is greater than the preset threshold value:

subtracting a bias voltage level corresponding to a boundary value of a lowest section between the plural threshold voltage distributions from the previous read voltage level to obtain a subtracted value;

dividing the subtracted value by the standard deviation regarding the one of the plural threshold voltage distributions to obtain a divided value; and

adding the boundary value to a value obtained by multiplying the divided value by the standard deviation ratio, a result of the adding being the read voltage level.

12. The method according to claim 8 , wherein the read voltage level is determined based on the mean difference when the standard deviation ratio is equal to or less than the preset threshold value.

13. The method according to claim 8 , wherein the read voltage level is determined to correspond to a level, at which a number of non-volatile memory cells is minimum in a sum of the plural threshold voltage distributions when the standard deviation ratio is equal to or less than the preset threshold value.

14. The method according to claim 8 , wherein the obtaining of the plural threshold voltage distributions includes:

applying plural candidate read voltages having different levels to the plurality of non-volatile memory cells to distinguish the data of adjacent values; and

determining the plural threshold voltage distributions based on numbers of the plurality of non-volatile memory cells storing the data of adjacent values.

15. A memory system, comprising:

a memory device including a plurality of non-volatile memory cells for storing data and a voltage supply circuit for supplying a read voltage to the plurality of non-volatile memory cells; and

a controller coupled to the memory device via a data path and configured to:

obtain at least some of plural threshold voltage distributions corresponding to data which is stored in the plurality of non-volatile memory cells and transferred via the data path,

determine a mean difference and a standard deviation ratio of the plural threshold voltage distributions,

determine a change of the read voltage, which is used for recognizing the data, based on the mean difference and the standard deviation ratio by determining whether the standard deviation ratio is less than a preset threshold value, and, when the standard deviation ratio is greater than the preset threshold value, shifting the read voltage level in a direction of a mean of a threshold voltage distribution which has a smaller standard deviation between the plural threshold voltage distributions, and

send the change of the read voltage to the memory device,

wherein the voltage supply circuit is further configured to:

adjust a level of the read voltage based on the change of the read voltage, and

apply the adjusted level of the read voltage to the plurality of non-volatile memory cells.

16. The memory system according to claim 15 , wherein the memory device comprises a table including information regarding how to determine a level of at least one read voltage applicable to the plurality of non-volatile memory cells.

17. The memory system according to claim 15 , wherein the change of the read voltage is determined based on the mean difference when the standard deviation ratio is equal to or less than the preset threshold value.

18. The memory system according to claim 15 , wherein the change of the read voltage is determined to correspond to a level, at which a number of non-volatile memory cells is minimum in a sum of the plural threshold voltage distributions when the standard deviation ratio is equal to or less than the preset threshold value.

19. The memory system according to claim 15 ,

wherein the mean difference is a difference between mean values of the plural threshold voltage distributions, and

wherein the controller is configured to determine the read voltage level based on a standardized value obtained by dividing a difference between a previous read voltage level and the mean difference by a standard deviation regarding one of the plural threshold voltage distributions.

20. The memory system according to claim 15 , wherein the controller is configured to, when the standard deviation ratio is greater than the preset threshold value, determine the read voltage level by a procedure of:

subtracting a bias voltage level corresponding to a boundary value of a lowest section between the plural threshold voltage distributions from the previous read voltage level to obtain a subtracted value;

dividing the subtracted value by the standard deviation regarding the one of the plural threshold voltage distributions to obtain a divided value; and

adding the boundary value to a value obtained by multiplying the divided value by the standard deviation ratio, a result of the adding being the read voltage level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2021
From: KIM, DAE SUNG
To: SK HYNIX INC.
Reel/Frame 055357/0461 →
Priority Claims (1)
KR 10-2020-0126823 · Sep 29, 2020 · national
Continuity (1)
Related Publication 20220100413A1 · Mar 31, 2022