Polar neural network decoder for memory devices

1. A method for error correction, comprising:

receiving a signal from a physical channel, wherein the signal is based on a modulated symbol representing information bits encoded using an error correction coding scheme, wherein the physical channel comprises a NAND memory device;

extracting features from the signal using a feature extractor trained using probability data collected from the physical channel; and

decoding the information bits with a neural network decoder taking the extracted features as input.

2. The method of claim 1 , further comprising:

detecting voltage levels from the NAND memory device, wherein the detected voltage levels comprise a noisy realization of the modulated symbol.

3. The method of claim 1 , wherein:

the modulated symbol comprises channel input to the NAND memory device, and the signal comprises a channel output from the NAND memory device.

4. The method of claim 1 , wherein:

the probability data collected from the physical channel comprises one or more probability mass functions.

5. The method of claim 1 , wherein:

the probability data does not assume an additive Gaussian white noise (AWGN) model.

6. The method of claim 1 , further comprising:

programming test symbols to a NAND memory device; and

detecting voltage levels of the NAND memory device, wherein the probability data is based on a conditional probability of detecting the voltage levels given each of the test symbols.

7. The method of claim 1 , further comprising:

encoding the information bits using an error correction coding scheme; and

apply a modulation scheme to the encoded information bits to produce the modulated symbol.

8. A method for training a neural network for error correction, comprising:

preparing a labeled training set comprising ground truth information bits and voltage levels read from a memory device, wherein the voltage levels are based on encoding the ground truth information bits and programming the encoded ground truth information bits to the memory device using a set of modulation symbols;

identifying a plurality of conditional probability mass functions based on the labeled training set, wherein each of the conditional probability mass functions describes a voltage level probability for one of the set of modulation symbols;

reading a voltage level from the memory device;

extracting features from the voltage levels based at least in part on the conditional probability mass functions;

apply a neural network decoder to the features to produce predicted information bits;

comparing the predicted information bits to the ground truth information bits; and

updating the neural network decoder based on the comparison.

9. The method of claim 8 , further comprising:

computing a gradient of a cross entropy of the predicted information bits and the ground truth information bits, wherein the comparison is based on the gradient of the cross entropy.

10. The method of claim 8 , wherein:

the voltage level read from the memory device corresponds to a noisy version of a symbol from the set of modulated symbols.

11. The method of claim 8 , further comprising:

encoding the ground truth information bits using an error correction coding scheme; and

apply a modulation scheme to the encoded ground truth information bits to produce modulated symbols, wherein the voltage levels are based on the modulated symbols.

12. The method of claim 11 , wherein:

the error correction coding scheme comprises a polar encoding scheme.

13. A memory device, the memory device comprising:

a plurality of memory cells configured to store encoded information bits;

a feature extractor configured to extract features from read voltage levels based on probability data collected for the memory device; and

a neural network decoder configured to decode the encoded information bits using the extracted features as input, wherein the neural network decoder comprises one or more fully connected multi-layer perceptron (MLP) layers.

14. The memory device of claim 13 , further comprising:

an encoding component configured to encode information bits to produce the encoded information bits; and

a modulation component configured to modulate the encoded information bits.

15. The memory device of claim 14 , further comprising:

a scaling component configured to scale output of the modulation component based on a dynamic voltage range of the memory cells.