IP Library › Granted Patent US 11,528,047
Granted Patent B2
US 11,528,047 · App. 16/996,278 · Granted Dec 13, 2022

Multilayer substrate, low-pass filter, high-pass filter, multiplexer, radio-frequency front-end circuit, and communication device

Inventor: Hideki Tsukamoto (Kyoto, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H04B1/40H03H7/0138H03H7/461H05K3/46
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Quick Facts
Patent No.
US 11,528,047
App. No.
16/996,278
Granted
Dec 13, 2022
Kind
B2
Abstract

A multilayer substrate includes a pair of first capacitor electrodes, a pair of second capacitor electrodes, and a dielectric substrate. Electrodes of the pair of first capacitor electrodes are disposed in dielectric substrate so as to face each other in a thickness direction of the dielectric substrate. Electrodes of the pair of second capacitor electrodes are disposed in the dielectric substrate so as to face each other in the thickness direction. A first element and a second element that are disposed in or on the dielectric substrate, and the pair of second capacitor electrodes, the pair of first capacitor electrodes, and a ground electrode that are disposed in the dielectric substrate are arranged in the stated order in the thickness direction. The pair of second capacitor electrodes at least partially overlaps the pair of first capacitor electrodes when viewed in plan in the thickness direction.

Claims (63)

1. A multilayer substrate, comprising:

an input/output electrode configured to receive an input signal, to output an output signal, or to receive the input signal and to output the output signal;

a ground electrode;

a first capacitor comprising a pair of first capacitor electrodes, the first capacitor being electrically connected between the input/output electrode and the ground electrode;

a second capacitor comprising a pair of second capacitor electrodes, the second capacitor being connected in parallel to the first capacitor; and

a dielectric substrate in or on which a first circuit element and a second circuit element are located, the first circuit element being in series with the first capacitor and the second circuit element being in series with the second capacitor, wherein:

the pair of first capacitor electrodes are located in the dielectric substrate so as to face each other in a thickness direction of the dielectric substrate,

the pair of second capacitor electrodes are located in the dielectric substrate so as to face each other in the thickness direction,

in the thickness direction, the first circuit element and the second circuit element are above the pair of second capacitor electrodes, the pair of second capacitor electrodes are above the pair of first capacitor electrodes, and the pair of first capacitor electrodes are above the ground electrode,

as seen in a plan view of the dielectric substrate along the thickness direction, the pair of second capacitor electrodes at least partially overlaps the pair of first capacitor electrodes, and

the electrode of the pair of second capacitor electrodes that is closest to the first capacitor:

has an area greater than an area of the electrode of the pair of second capacitor electrodes that is farthest from the first capacitor, and

as seen in the plan view, at least partially overlaps the electrode of the pair of first capacitor electrodes that is farthest from the second capacitor.

2. The multilayer substrate according to claim 1 , wherein:

a series circuit comprises the second capacitor and the second circuit element connected in series,

a parallel circuit comprises the first capacitor and the series circuit connected in parallel,

the first circuit element and the parallel circuit are connected in series, and

the second circuit element is electrically connected between the second capacitor and the ground electrode.

3. The multilayer substrate according to claim 1 , wherein, as seen in the plan view, the pair of second capacitor electrodes entirely overlaps the pair of first capacitor electrodes.

4. The multilayer substrate according to claim 1 , wherein:

the first circuit element is an inductor, and

the second circuit element is a switch.

5. A low-pass filter, comprising the multilayer substrate according to claim 1 , wherein a pass band of the low-pass filter is less than or equal to a predetermined frequency.

6. A high-pass filter, comprising the multilayer substrate according to claim 1 , wherein a pass band of the high-pass filter is greater than or equal to a predetermined frequency.

7. A multiplexer, comprising the multilayer substrate according to claim 1 , wherein:

the multilayer substrate comprises a plurality of the input/output electrodes and further comprises:

a first series-arm capacitor, and

a second series-arm capacitor,

the plurality of input/output electrodes comprise:

an antenna-side terminal connected to an antenna, and

a first terminal and a second terminal that are different from the antenna-side terminal,

the first series-arm capacitor is on a first path that connects the antenna-side terminal to the first terminal, and is part of a first filter, and

the second series-arm capacitor is on a second path that connects the antenna-side terminal to the second terminal, and is part of a second filter.

8. A radio-frequency front-end circuit, comprising:

the multiplexer according to claim 7 ; and

an amplifier circuit connected to the multiplexer.

9. A communication device, comprising:

the radio-frequency front-end circuit according to claim 8 ; and

a radio frequency (RF) signal processing circuit configured to process radio-frequency signals received through the antenna,

wherein the radio-frequency front-end circuit is configured to transmit the radio-frequency signals between the antenna and the RF signal processing circuit.

10. A multilayer substrate comprising:

an input/output electrode configured to receive an input signal, to output an output signal, or to receive the input signal and to output the output signal;

a ground electrode;

a first capacitor comprising a pair of first capacitor electrodes, the first capacitor being electrically connected between the input/output electrode and the ground electrode;

a second capacitor comprising a pair of second capacitor electrodes, the second capacitor being connected in parallel to the first capacitor; and

a dielectric substrate in or on which a first circuit element and a second circuit element are located, the first circuit element being in series with the first capacitor and the second circuit element being in series with the second capacitor, wherein:

the pair of first capacitor electrodes are located in the dielectric substrate so as to face each other in a thickness direction of the dielectric substrate,

the pair of second capacitor electrodes are located in the dielectric substrate so as to face each other in the thickness direction,

in the thickness direction, the first circuit element and the second circuit element are above the pair of second capacitor electrodes, the pair of second capacitor electrodes are above the pair of first capacitor electrodes, and the pair of first capacitor electrodes are above the ground electrode,

as seen in a plan view of the dielectric substrate along the thickness direction, the pair of second capacitor electrodes at least partially overlaps the pair of first capacitor electrodes, and

a connection path in the dielectric substrate that electrically connects the first circuit element and the second capacitor,

wherein, as seen in the plan view, the connection path overlaps the first capacitor.

11. A multilayer substrate comprising:

an input/output electrode configured to receive an input signal, to output an output signal, or to receive the input signal and to output the output signal;

a ground electrode;

a first capacitor comprising a pair of first capacitor electrodes, the first capacitor being electrically connected between the input/output electrode and the ground electrode;

a second capacitor comprising a pair of second capacitor electrodes, the second capacitor being connected in parallel to the first capacitor; and

a dielectric substrate in or on which a first circuit element and a second circuit element are located, the first circuit element being in series with the first capacitor and the second circuit element being in series with the second capacitor, wherein:

the pair of first capacitor electrodes are located in the dielectric substrate so as to face each other in a thickness direction of the dielectric substrate,

the pair of second capacitor electrodes are located in the dielectric substrate so as to face each other in the thickness direction,

in the thickness direction, the first circuit element and the second circuit element are above the pair of second capacitor electrodes, the pair of second capacitor electrodes are above the pair of first capacitor electrodes, and the pair of first capacitor electrodes are above the ground electrode, and

as seen in a plan view of the dielectric substrate along the thickness direction, the pair of second capacitor electrodes at least partially overlaps the pair of first capacitor electrodes,

wherein the electrode of the pair of first capacitor electrodes that is farthest from the second capacitor is also the ground electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2020
From: TSUKAMOTO, HIDEKI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 053527/0845 →
Priority Claims (1)
JP JP2018-027443 · Feb 19, 2018 · national
Continuity (2)
Continuation PCTJP2019005867 · Feb 18, 2019
Related Publication 20200382152A1 · Dec 3, 2020
Cited By (1)
US 12,395,143