IP Library Granted Patent US 11,533,445
Granted Patent B2
US 11,533,445 · App. 16/649,808 · Granted Dec 20, 2022

Solid-state image sensor and electronic device

Inventors: Tatsuki Nishino (Kanagawa, JP); Hiroki Hiyama (Kanagawa, JP); Shizunori Matsumoto (Kanagawa, JP); Takahiro Miura (Kanagawa, JP); Akihiko Miyanohara (Tokyo, JP); Tomohiro Matsumoto (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04N5/36961G01J1/44H01L27/14643H04N5/351G01J2001/4466
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Quick Facts
Patent No.
US 11,533,445
App. No.
16/649,808
Granted
Dec 20, 2022
Kind
B2
Abstract

To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Claims (51)

1. A light detecting device, comprising:

first pixel circuitry including a first avalanche photodiode configured to output a first output signal;

second pixel circuitry including a second avalanche photodiode and a buffer circuit, the second pixel circuitry configured to output a second output signal; and

a control circuit including a comparison unit, the control circuit configured to receive the second output signal, wherein

an output of the control circuit is coupled to an anode of the first avalanche photodiode and an anode of the second avalanche photodiode.

2. The light detecting device according to claim 1 , wherein the control circuit is configured to receive the second output signal from the second pixel circuitry, and to adjust the output based on the second output signal.

3. The light detecting device according to claim 1 , wherein

the second avalanche photodiode is one of a plurality of the second avalanche photodiodes,

the anode is one of a plurality of anodes, each of which corresponds to one of the plurality of second avalanche photodiodes, and

the output of the control circuit is coupled to the plurality of anodes.

4. The light detecting device according to claim 3 , wherein the plurality of second avalanche photodiodes are disposed in a row.

5. The light detecting device according to claim 1 , wherein

the first pixel circuitry and the second pixel circuitry are arranged in an array, and

a first part of the array is shielded from light.

6. The light detecting device according to claim 5 , wherein

a second part of the array is not shielded from light, and

the first avalanche photodiode and the second avalanche photodiode are located in the second part of the array.

7. The light detecting device according to claim 1 , wherein the first pixel circuitry includes an inverter and a transistor, one of a source or a drain of the transistor being coupled to a first potential.

8. The light detecting device according to claim 7 , wherein the inverter and the other of the source or the drain of the transistor are coupled to a cathode of the first avalanche photodiode.

9. The light detecting device according to claim 1 , wherein the second pixel circuitry includes an inverter and a transistor, one of a source or a drain of the transistor being coupled to a first potential.

10. The light detecting device according to claim 1 , wherein

the first pixel circuitry includes a first inverter and a first transistor, a source or a drain of the first transistor being coupled to a first potential, and

the second pixel circuitry includes a second inverter and a second transistor, a source or a drain of the second transistor being coupled to a first potential.

11. The light detecting pixel according to claim 1 , wherein a distance data is calculated based on the first output signal.

12. An electronic apparatus, comprising:

a light emitting device configured to generate an irradiation light; and

a light receiving device configured to receive a reflected light with respect to the irradiation light, the light receiving device including:

first pixel circuitry including a first avalanche photodiode configured to output a first output signal;

second pixel circuitry including a second avalanche photodiode and a buffer circuit, the second pixel circuitry configured to output a second output signal; and

a control circuit including a comparison unit, the control circuit configured to receive the second output signal, wherein

an output of the control circuit is coupled to an anode of the first avalanche photodiode and an anode of the second avalanche photodiode.

13. The electronic apparatus according to claim 12 , wherein

the second avalanche photodiode is one of a plurality of the second avalanche photodiodes,

the anode is one of a plurality of anodes, each of which corresponds to one of the plurality of second avalanche photodiodes, and

the output of the control circuit is coupled to the plurality of anodes.

14. The electronic apparatus according to claim 13 , wherein the plurality of second avalanche photodiodes are disposed in a row.

15. The electronic apparatus according to claim 12 , wherein

the first pixel circuitry and the second pixel circuitry are arranged in an array, and

a first part of the array is shielded from light.

16. The electronic apparatus according to claim 15 , wherein at least a portion of the buffer circuit is located in the first part of the array.

17. The electronic apparatus according to claim 15 , wherein

a second part of the array is not shielded from light, and

the first avalanche photodiode and the second avalanche photodiode are located in the second part of the array.

18. The electronic apparatus according to claim 12 , wherein

the first pixel circuitry includes a first inverter and a first transistor, and

the second pixel circuitry includes a second inverter and a second transistor.

19. The electronic apparatus according to claim 18 , wherein

the first inverter and the first transistor are coupled to a cathode of the first avalanche photodiode, and

the second inverter and the second transistor are coupled to a cathode of the second avalanche photodiode.

20. The electronic apparatus according to claim 12 , wherein the light receiving device is configured to measure a round-trip time based on a first timing at which the light emitting device generates the emitted light and a second timing at which the light receiving device receives the reflected light.

21. The electronic apparatus according to claim 12 , wherein a distance data is calculated based on the first output signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2020
From: NISHINO, TATSUKI; HIYAMA, HIROKI; MATSUMOTO, SHIZUNORI; MIURA, TAKAHIRO; MIYANOHARA, AKIHIKO; MATSUMOTO, TOMOHIRO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 052196/0179 →
Priority Claims (1)
JP JP2017-198122 · Oct 12, 2017 · national
Continuity (1)
Related Publication 20200314375A1 · Oct 1, 2020
Cited By (1)
US 12,207,008