IP Library Granted Patent US 11,538,899
Granted Patent B2
US 11,538,899 · App. 17/308,072 · Granted Dec 27, 2022

Semiconductor device and manufacturing method thereof

Inventors: Ching-Sung Ho (Hsinchu, TW); Jia-Horng Tsai (Taipei, TW)
Assignee: Powerchip Semiconductor Manufacturing Corporation
H01L28/84H01L27/10814H01L27/10852
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Quick Facts
Patent No.
US 11,538,899
App. No.
17/308,072
Granted
Dec 27, 2022
Kind
B2
Abstract

A semiconductor device including a substrate and a capacitor is provided. The capacitor includes a first electrode, a second electrode, and an insulating layer. The first electrode is located on the substrate. The first electrode has a plurality of hemispherical recesses. The second electrode is located on the first electrode. The insulating layer is located between the first electrode and the second electrode. Surfaces of the hemispherical recesses are in direct contact with the insulating layer.

Claims (30)

1. A method for manufacturing a semiconductor device, comprising:

providing a substrate; and

forming a capacitor on the substrate, wherein the capacitor comprises:

a first electrode, located on the substrate, wherein the first electrode has a plurality of hemispherical recesses;

a second electrode, located on the first electrode; and

an insulating layer, located between the first electrode and the second electrode, wherein surfaces of the hemispherical recesses are in direct contact with the insulating layer, and

the semiconductor device comprises a plurality of capacitors, and further comprises:

a support structure, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein the support structure comprises:

a first support layer, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein a bottom surface of the first electrode is lower than a bottom surface of the first support layer; and

a second support layer, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein the first support layer is located between the second support layer and the substrate.

2. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein

the first electrode located between the first support layer and the second support layer has the hemispherical recesses, and

the first electrode located between the substrate and the first support layer has the hemispherical recesses.

3. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein the first electrode located between the first support layer and the second support layer has the hemispherical recesses.

4. A semiconductor device, comprising:

a substrate; and

a capacitor, comprising:

a first electrode, located on the substrate, wherein the first electrode has a plurality of hemispherical recesses;

a second electrode, located on the first electrode; and

an insulating layer, located between the first electrode and the second electrode, wherein surfaces of the hemispherical recesses are in direct contact with the insulating layer, and

the semiconductor device comprises a plurality of capacitors, and further comprises:

a support structure, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein the support structure comprises:

a first support layer, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein a bottom surface of the first electrode is lower than a bottom surface of the first support layer; and

a second support layer, connected between adjacent two of the first electrodes of adjacent two of the capacitors, wherein the first support layer is located between the second support layer and the substrate.

5. The semiconductor device as claimed in claim 4 , wherein

the first electrode located between the first support layer and the second support layer has the hemispherical recesses, and

the first electrode located between the substrate and the first support layer has the hemispherical recesses.

6. The semiconductor device as claimed in claim 4 , wherein the first electrode located between the first support layer and the second support layer has the hemispherical recesses.

7. The semiconductor device as claimed in claim 4 , wherein a material of the first electrode comprises a metal compound or metal.

8. The semiconductor device as claimed in claim 4 , wherein a shape of the first electrode comprises a cylindrical shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2021
From: HO, CHING-SUNG; TSAI, JIA-HORNG
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 056149/0694 →
Priority Claims (1)
TW 110111199 · Mar 26, 2021 · national
Continuity (1)
Related Publication 20220310780A1 · Sep 29, 2022