Artificial neural network model and electronic device including the same

1. An electronic device comprising

a processing logic configured to receive input image data and generate output image data having a different format from the input image data using an artificial neural network model,

wherein the artificial neural network model comprises:

a plurality of encoding layer units comprising a plurality of layers, wherein each layer of the plurality of layers comprises an encoder level, and wherein the encoder level comprises an ordinal number of layers from an input layer; and

a plurality of decoding layer units comprising a plurality of other layers, wherein each other layer of the plurality of other layers comprises a decoder level, wherein the decoder level comprises an ordinal number of layers from an output layer, and wherein each other layer is configured to form a skip connection with a corresponding layer of the plurality of layers having a same encoder level as the decoder level of the other layer,

wherein a first encoding layer unit of a first level receives a first input feature map and outputs a first output feature map, which is based on the first input feature map, to a subsequent encoding layer unit and a decoding layer unit at the first level.

2. The electronic device of claim 1 , wherein

the processing logic receives skip level information and activates or inactivates the skip connection based on a skip level indicated by the skip level information.

3. The electronic device of claim 1 , wherein

a layer of the encoding layer unit and a layer of the decoding layer unit, which are connected by the skip connection, perform symmetrical operations to each other.

4. The electronic device of claim 1 , wherein

the first encoding layer unit adjusts a depth of the first output feature map based on the first level.

5. The electronic device of claim 4 , wherein

the first encoding layer unit adjusts a depth of an output feature map based on a function having the first level as a parameter, and the function is a linear function having the first level as the parameter.

6. The electronic device of claim 1 , wherein

convolution layers of the encoding layer unit and the decoding layer unit, which are at a same level, are connected by the skip connection, feature map blocks of the encoding layer unit and the decoding layer unit, which are at the same level, are connected by the skip connection, or a down-sampling layer and an up-sampling layer of the encoding layer unit and the decoding layer unit, which are at the same level, are connected by the skip connection.

7. The electronic device of claim 1 , wherein

the encoding layer unit and the decoding layer unit at each level comprise feature map blocks,

wherein each of the feature map blocks comprises a leading layer group configured to output a first feature map, a middle layer group configured to receive the first feature map and output a second feature map, a summator configured to summate the first feature map and the second feature map and output a third feature map, and an output activation layer configured to output a fourth feature map based on the third feature map.

8. The electronic device of claim 1 , wherein

the encoding layer unit comprises a down-sampling unit configured to receive a fifth feature map, select some of feature values included in the fifth feature map, and output the first output feature map having a smaller size than the fifth feature map.

9. The electronic device of claim 1 , wherein

the input image data comprises a tetra image, and the output image data comprises a red-green-blue (RGB) image.

10. An electronic device comprising

a processing logic configured to perform an operation using an artificial neural network model,

wherein the artificial neural network model comprises:

a plurality of encoding layer units comprising a plurality of layers, wherein each layer of the plurality of layers comprises an encoder level, and wherein the encoder level comprises an ordinal number of layers from an input layer; and

a plurality of decoding layer units comprising a plurality of other layers, wherein each other layer of the plurality of other layers comprises a decoder level, wherein the decoder level comprises an ordinal number of layers from an output layer, and wherein each other layer is configured to form a skip connection with a corresponding layer of the plurality of layers having a same encoder level as the decoder level of the other layer, respectively,

wherein a first encoding layer unit located at a first level of the plurality of levels receives a first input feature map, outputs a first output feature map to an encoding layer unit located at a next level of the first level and a decoding layer unit of the first level, and adjusts a depth of the first output feature map based on the first level.

11. The electronic device of claim 10 , wherein

the first encoding layer unit adjusts a depth of an output feature map based on a function having the first level as a parameter, and the function adjusts the depth of the output feature map to a smaller value than a function having the first level as an exponent.

12. The electronic device of claim 10 , wherein

a layer of the encoding layer unit and a layer of the decoding layer unit, which are at a same level, are selectively connected to each other.

13. The electronic device of claim 12 , wherein

the processing logic receives skip level information and activates or inactivates connection of the plurality of encoding layer units and the plurality of decoding layer units, which are at the same levels, based on a skip level indicated by the skip level information.

14. The electronic device of claim 12 , wherein

the layer of the encoding layer unit and the layer of the decoding layer unit, which are at the same level, perform symmetrical operations to each other.

15. The electronic device of claim 12 , wherein

convolution layers of the encoding layer unit and the decoding layer unit, which are at the same level, are selectively connected to each other, feature map blocks of the encoding layer unit and the decoding layer unit, which are at the same level, are selectively connected to each other, or a down-sampling layer and an up-sampling layer of the encoding layer unit and the decoding layer unit, which are at the same level, are connected to each other.

16. The electronic device of claim 10 , wherein

the encoding layer unit and the decoding layer unit, which are at each level, comprise feature map blocks,

wherein each of the feature map blocks comprises a leading layer group configured to output a first feature map, a middle layer group configured to receive the first feature map and output a second feature map, a summator configured to summate the first feature map and the second feature map and output a third feature map, and an output activation layer configured to output a fourth feature map based on the third feature map.

17. The electronic device of claim 16 , wherein

wherein the leading layer group comprises one convolution layer and one activation layer, and

the middle layer group is configured to sequentially connect a plurality of convolution layers and a plurality of activation layers.

18. The electronic device of claim 10 , wherein

the encoding layer unit comprises a down-sampling unit configured to receive a fifth feature map, select some of feature values included in the fifth feature map, and output the first output feature map having a smaller size than the fifth feature map.

19. The electronic device of claim 18 , wherein

the processing logic receives sampling position information, and

the down-sampling unit selects feature values located at a position based on the sampling position information, from among feature values included in the fifth feature map.

20. An electronic device configured to perform an image processing operation, the electronic device comprising

a processing logic configured to receive tetra image data from a color filter array in which four identical color filters are arranged in two rows and two columns and form one pixel unit, the processing logic being configured to generate output image data having a different format from the tetra image data using an artificial neural network model,

wherein the artificial neural network model comprises:

a plurality of encoding layer units comprising a plurality of layers, wherein each layer of the plurality of layers comprises an encoder level, and wherein the encoder level comprises an ordinal number of layers from an input layer, respectively; and

a plurality of decoding layer units comprising a plurality of other layers, wherein each other layer of the plurality of other layers comprises a decoder level, wherein the decoder level comprises an ordinal number of layers from an output layer, and wherein each other layer is configured to form a skip connection with a corresponding layer of the plurality of layers having a same encoder level as the decoder level of the other layer,

wherein a first encoding layer unit receives a first input feature map and outputs a first output feature map, which is based on the first input feature map, to a subsequent encoding layer unit and a decoding layer unit at a first level.