Package including multiple semiconductor devices
In a general aspect, an apparatus can include an inner package including a first silicon carbide die having a die gate conductor coupled to a common gate conductor, and a second silicon carbide die having a die gate conductor coupled to the common gate conductor. The apparatus can include an outer package including a substrate coupled to the common gate conductor, and a clip coupled to the inner package and coupled to the substrate.
1. An apparatus, comprising:
an inner package including:
a first silicon carbide die having a die gate conductor coupled to a common gate conductor, and
a second silicon carbide die having a die gate conductor coupled to the common gate conductor,
an outer package including:
a substrate coupled to the common gate conductor, and
at least one clip coupled to the inner package and coupled to the substrate.
2. The apparatus of claim 1 , wherein the substrate includes a gate metal runner in a metal layer of the substrate coupled to the common gate conductor in the inner package.
3. The apparatus of claim 1 , wherein the at least one clip is coupled to a top side of the inner package and a metal layer of the substrate.
4. The apparatus of claim 3 , wherein the substrate includes a gate metal runner in the metal layer of the substrate, the metal layer of the substrate is coupled to the common gate conductor in the inner package.
5. The apparatus of claim 1 , wherein the substrate includes a dielectric disposed between metal layers.
6. The apparatus of claim 1 , wherein the outer package includes a lead extending outside of the outer package.
7. The apparatus of claim 6 , wherein the lead is electrically coupled to the inner package via the at least one clip.
8. The apparatus of claim 1 , wherein the substrate is a first substrate coupled to a bottom side of the at least one clip,
the apparatus further comprising:
a second substrate coupled to a top side of the at least one clip.
9. The apparatus of claim 1 , wherein the substrate has an opening configured to facilitate cooling.
10. The apparatus of claim 1 , wherein the at least one clip has a first portion aligned orthogonal to a second portion of the at least one clip.
11. The apparatus of claim 1 , wherein the substrate includes a gate metal runner in a metal layer of the substrate coupled to the common gate conductor in the inner package,
the inner package includes a first conductive path between the gate metal runner and the gate conductor of the first silicon carbide die, and a second conductive path between the gate metal runner and the gate conductor of the second silicon carbide die, the first conductive path has a length substantially equal to a length of the second conductive path.
12. The apparatus of claim 1 , wherein the first silicon carbide die and the second silicon carbide die are aligned along the same plane, the first silicon carbide die having an edge parallel to or non-parallel to an edge of the second silicon carbide die.
13. The apparatus of claim 1 , wherein the first silicon carbide die and the second silicon carbide die are aligned along the same plane,
the apparatus further comprising:
a diode aligned along the same plane, the first silicon carbide die and the second silicon carbide die being disposed between the diode and the common gate conductor.
14. An apparatus, comprising:
an inner package encapsulating in an insulator:
at least a portion of a conductive metal layer including a common gate conductor, and
a plurality of semiconductor die coupled to the common gate conductor of the conductive metal layer, the plurality of semiconductor die including a first silicon carbide die and a second silicon carbide die; and
an outer package encapsulating:
the inner package,
a substrate coupled to the common gate conductor, and
at least one clip, coupled to the inner package and coupled to the substrate.
15. The apparatus of claim 14 , wherein the conductive metal layer includes a first conductive path between the common gate conductor and a die gate conductor of the first silicon carbide die, and a second conductive path between the common gate conductor and a die gate conductor of the second silicon carbide die.
16. The apparatus of claim 14 , wherein the plurality of semiconductor die are defined in a diamond configuration.
17. An apparatus, comprising:
an outer package including:
a gate metal runner within a substrate, and
at least one clip;
an inner package disposed in the outer package and including:
a first silicon carbide die having a gate conductor, and
a second silicon carbide die having a gate conductor,
a first conductive path between the gate metal runner and the gate conductor of the first silicon carbide die,
a second conductive path between the gate metal runner and the gate conductor of the second silicon carbide die,
the inner package being electrically coupled to the substrate of the outer package via the at least one clip.
18. The apparatus of claim 17 , wherein the first silicon carbide die and the second silicon carbide die are aligned along the same plane and are electrically coupled to a leadframe of the inner package, the gate metal runner is electrically coupled to the leadframe.
19. The apparatus of claim 17 , wherein the gate conductor of the first silicon carbide die is oriented with respect to the gate metal runner so that a length of the first conductive path is minimized.
20. The apparatus of claim 17 , wherein the substrate is a first substrate coupled to a bottom side of the at least one clip,
the apparatus further comprising:
a second substrate coupled to a top side of the at least one clip.