Light emitting display device and manufacturing method thereof

1. A light emitting display device, comprising:

a light emitting element;

a second transistor connected to a scan line;

a first transistor which applies a current to the light emitting element;

a capacitor connected to a gate electrode of the first transistor; and

a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor,

wherein channels of the second transistor, the first transistor, and the third transistor are disposed in a polycrystalline semiconductor layer, and

a width of a channel of the third transistor is in a range of 1 μm to 2 μm, and a length of the channel of the third transistor is in a range of 1 μm to 2.5 μm.

2. The light emitting display device of claim 1 , wherein

the third transistor has a dual structure.

3. The light emitting display device of claim 2 , wherein

the width of the channel of the third transistor is in a range of ⅓ to ½ of a width of the channel of the first transistor.

4. The light emitting display device of claim 1 , further comprising:

a fourth transistor which initializes the gate electrode of the first transistor to an initializing voltage,

wherein a width of a channel of the fourth transistor is in a range of 1 μm to 2 μm, and a length of the channel of the fourth transistor is in a range of 1 μm to 2.5 μm.

5. The light emitting display device of claim 4 , wherein

the fourth transistor has a dual structure.

6. The light emitting display device of claim 5 , wherein

the width of the channel of the fourth transistor is in a range of ⅓ to ½ of a width of the channel of the first transistor.

7. The light emitting display device of claim 6 , further comprising:

a fifth transistor connected between the first transistor and a driving voltage line; and

a sixth transistor connected between the light emitting element and the first transistor,

wherein the length of the channel of the third transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

8. The light emitting display device of claim 7 , wherein

the length of the channel of the fourth transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

9. The light emitting display device of claim 7 , wherein

the third transistor has a single structure.

10. The light emitting display device of claim 9 , wherein

a width of a channel of the second transistor is in a range of 1 μm to 2 μm, and

a length of the channel of the second transistor is in a range of 1 μm to 2.5 μm.

11. The light emitting display device of claim 10 , wherein

the width of the channel of the second transistor is in a rage of ⅓ to ½ of a width of the channel of the first transistor.

12. The light emitting display device of claim 10 , wherein

the length of the channel of the second transistor is in a range of ⅓ to ½ of a length of a channel of the fifth transistor or the sixth transistor.

13. The light emitting display device of claim 1 , further comprising:

a gate insulating film covering the polycrystalline semiconductor layer,

wherein the gate insulating film is defined by one of a single layer of silicon oxide film and a double layer of a silicon nitride film and the silicon oxide film,

wherein the gate insulating film has a thickness value in a range of 800 Å to 1200 Å,

wherein the thickness value of the gate insulating film is a thickness of the single layer of the silicon oxide film or a converted thickness of the double layer of the silicon nitride film and the silicon oxide film to the thickness of the single layer of the silicon oxide film.

14. The light emitting display device of claim 1 , wherein

the light emitting display device is driven even at a low frequency of 60 Hz or less.

15. A display device comprising:

a substrate;

a semiconductor layer disposed on the substrate, wherein the semiconductor layer includes a polycrystalline semiconductor;

a first gate insulating film covering the semiconductor layer;

a first gate conductor disposed on the first gate insulating film;

a second gate insulating film covering the first gate conductor and the first gate insulating film;

a second gate conductor disposed on the second gate insulating film;

an interlayer insulating film covering the second gate conductor and the second gate insulating film;

a data conductor disposed on the interlayer insulating film; and

a passivation film covering the data conductor and the interlayer insulating film,

wherein the first gate insulating film is defined by one of a single later of a silicon oxide film and a double later of a silicon nitride film and the silicon oxide film,

wherein the first gate insulating film has a thickness value in a range of 800 Å to 1200 Å,

wherein the thickness value of the first gate insulating film is a thickness of the single layer of the silicon oxide film or a converted thickness of the double layer of the silicon nitride film and the silicon oxide film to the thickness of the single layer of the silicon oxide film, and

wherein a length of a channel of a transistor defined by a portion of the semiconductor later is in a range of 1 μm to 2.5 μm.

16. The light emitting display device of claim 15 , wherein

the first gate insulating film is the single film of the silicon oxide film.

17. The light emitting display device of claim 15 , wherein

the first gate insulating film is the double layer of the silicon nitride film and the silicon oxide film, wherein the silicon oxide film is disposed on the semiconductor layer, and the silicon nitride film is disposed on the silicon oxide film.