Identifying and responding to a side-channel security threat

1. A method for managing memory within a computing system, the method comprising:

identifying, by one or more computer processors, a range of physical memory addresses that store a first data;

determining, by the one or more computer processors, whether a second data is stored within the range of physical memory addresses that stores the first data;

responsive to determining that the second data is stored within the range of physical memory addresses that store the first data, determining, by the one or more computer processors, whether a process accessing the second data is identified as associated with a side-channel attack;

responsive to determining that the process accessing the second data is associated with the side-channel attack, initiating, by the one or more computer processors, a response associated with the process accessing the second data;

responsive to initiating the response associated with the process accessing the second data, configuring, by the one or more computer processors, a set of counters to monitor the range of physical memory addresses that stores the first data;

determining, by the one or more computer processors using the set of counters, a rate of access associated with the monitored range of physical memory addresses; and

responsive to the rate of access associated with the monitored range of physical memory addresses exceeding a threshold value, identifying, by the one or more computer processors, one or more processes associated with the rate of access.

2. The method of claim 1 , wherein the first data is identified as critical data related to the computing system.

3. The method of claim 1 , further comprising:

determining, by the one or more computer processors, whether at least a portion of the first data and at least a portion of the second data are stored within one or more memory modules that are susceptible to the side-channel attack, based on the range of physical memory addresses respectively associated with storing the first data and the second data;

responsive to determining that at least the portion of the first data and at least the portion of the second data are stored among the one or more memory modules that are susceptible to the side-channel attack, determining, by the one or more computer processors, a rate of access corresponding to the second data; and

determining, by the one or more computer processors, that the process that accesses the second data is associated with the side-channel attack based on determining the rate of access corresponding to the second data exceeds a susceptibility rating corresponding to a memory module that stores the first data.

4. The method of claim 1 , wherein determining whether the process accessing the second data is identified as associated with the side-channel attack is based on determining that a repetitive rate-of-access of a memory module that stores the second data exceeds a refresh rate of the memory module.

5. The method of claim 3 , wherein the susceptibility rating of the memory module based on is based on information selected from the group a group consisting of a rate of read requests, a temperature of the memory module, one or more characteristics of the memory module determined by a manufacturer of the memory module, and a rate of over-clocking.

6. The method of claim 1 , further comprising:

determining, by the one or more computer processors, whether two or more processes access the second data;

responsive to determining that the two or more processes access the second data, determining, by the one or more computer processors, whether an aggregated rate of access of the second data by the two or more processes exceeds a susceptibility rating corresponding to a memory module that stores the first data; and

responsive to determining that the aggregated rate of access of the second data by the two or more processes exceed the susceptibility rating corresponding to the memory module that stores the first data, determining, by the one or more computer processors, that the two or more processes are associated with the side-channel attack.

7. The method of claim 1 , further comprising:

determining, by the one or more computer processors, an identity of the process accessing the second data based on accessing one or more tables generated by a hypervisor of the computing system.

8. A computer program product for managing memory within a computing system, the computer program product comprising:

one or more computer readable storage media and program instructions stored on the one or more computer readable storage media, the program instructions readable/executable by one or more computer processors:

program instructions to identify a range of physical memory addresses that store a first data;

program instructions to determine whether a second data is stored within the range of physical memory addresses that stores the first data;

responsive to determining that the second data is stored within the range of physical memory addresses that store the first data, program instructions to determine whether a process accessing the second data is identified as associated with a side-channel attack;

responsive to determining that the process accessing the second data is associated with the side-channel attack, program instructions to initiate a response associated with the process accessing the second data;

responsive to initiating the response associated with the process accessing the second data, program instructions to configure, by the one or more computer processors, a set of counters to monitor the range of physical memory addresses that stores the first data;

program instructions to determine, by the one or more computer processors using the set of counters, a rate of access associated with the monitored range of physical memory addresses; and

responsive to the rate of access associated with the monitored range of physical memory addresses exceeding a threshold value, program instructions to identify, by the one or more computer processors, one or more processes associated with the rate of access.

9. The computer program product of claim 8 , wherein the first data is identified as critical data related to the computing system.

10. The computer program product of claim 8 , further comprising:

program instructions to determine whether at least a portion of the first data and at least a portion of the second data are stored within one or more memory modules that are susceptible to the side-channel attack, based on the range of physical memory addresses respectively associated with storing the first data and the second data;

responsive to determining that at least the portion of the first data and at least the portion of the second data are stored among the one or more memory modules that are susceptible to the side-channel attack, program instructions to determine a rate of access corresponding to the second data; and

program instructions to determine that the process that accesses the second data is associated with the side-channel attack based on determining the rate of access corresponding to the second data exceeds a susceptibility rating corresponding to a memory module that stores the first data.

11. The computer program product of claim 8 , wherein program instructions to determine whether the process accessing the second data is identified as associated with the side-channel attack is based on program instructions to determine that a repetitive rate-of-access of a memory module that stores the second data exceeds a refresh rate of the memory module.

12. The computer program product of claim 10 , wherein the susceptibility rating of the memory module based on is based on information selected from the group a group consisting of a rate of read requests, a temperature of the memory module, one or more characteristics of the memory module determined by a manufacturer of the memory module, and a rate of over-clocking.

13. The computer program product of claim 8 , further comprising:

program instructions to determine whether two or more processes access the second data;

responsive to determining that the two or more processes access the second data, program instructions to determine whether an aggregated rate of access of the second data by the two or more processes exceed a susceptibility rating corresponding to a memory module that stores the first data; and

responsive to determining that the aggregated rate of access of the second data by the two or more processes exceed the susceptibility rating corresponding to the memory module that stores the first data, program instructions to determine that the two or more processes are associated with the side-channel attack.

14. The computer program product of claim 8 , further comprising:

program instructions to determine an identity of the process accessing the second data based on accessing one or more tables generated by a hypervisor of the computing system.

15. A computer system for managing the memory a memory within a computing system, the computer system comprising:

one or more computer processors;

one or more computer readable storage media; and

program instructions stored on the one or more computer readable storage media for execution by at least one of the one or more computer processors, the program instructions comprising:

program instructions to identify a range of physical memory addresses that store a first data;

program instructions to determine whether a second data is stored within the range of physical memory addresses that stores the first data;

responsive to determining that the second data is stored within the range of physical memory addresses that store the first data, program instructions to determine whether a process accessing the second data is identified as associated with a side-channel attack;

responsive to determining that the process accessing the second data is associated with the side-channel attack, program instructions to initiate a response associated with the process accessing the second data;

responsive to initiating the response associated with the process accessing the second data, program instructions to configure, by the one or more computer processors, a set of counters to monitor the range of physical memory addresses that stores the first data;

program instructions to determine, by the one or more computer processors using the set of counters, a rate of access associated with the monitored range of physical memory addresses; and

responsive to the rate of access associated with the monitored range of physical memory addresses exceeding a threshold value, program instructions to identify, by the one or more computer processors, one or more processes associated with the rate of access.

16. The computer system of claim 15 , wherein the first data is identified as critical data related to the computing system.

17. The computer system of claim 15 , further comprising:

program instructions to determine whether at least a portion of the first data and at least a portion of the second data are stored within one or more memory modules that are susceptible to the side-channel attack, based on the range of physical memory addresses respectively associated with storing the first data and the second data;

responsive to determining that at least the portion of the first data and at least the portion of the second data are stored among the one or more memory modules that are susceptible to the side-channel attack, program instructions to determine a rate of access corresponding to the second data; and

program instructions to determine that the process that accesses the second data is associated with the side-channel attack based on determining the rate of access corresponding to the second data exceeds a susceptibility rating corresponding to a memory module that stores the first data.

18. The computer system of claim 15 , wherein program instructions to determine whether the process accessing the second data is identified as associated with the side-channel attack is based on program instructions to determine that a repetitive rate-of-access of a memory module that stores the second data exceeds a refresh rate of the memory module.

19. The computer system of claim 15 , further comprising:

program instructions to determine whether two or more processes access the second data;

responsive to determining that the two or more processes access the second data, program instructions to determine whether an aggregated rate of access of the second data by the two or more processes exceed a susceptibility rating corresponding to a memory module that stores the first data; and

responsive to determining that the aggregated rate of access of the second data by the two or more processes exceed the susceptibility rating corresponding to the memory module that stores the first data, program instructions to determine that the two or more processes are associated with the side-channel attack.

20. The computer system of claim 15 , further comprising:

program instructions to determine an identity of the process accessing the second data based on accessing one or more tables generated by a hypervisor of the computing system.