Methods for sub-lithography resolution patterning
Disclosed are approaches for forming a semiconductor device. In some embodiments, a method may include providing a plurality of patterning structures over a device layer, each of the plurality of patterning structures including a first sidewall, a second sidewall, and an upper surface, and forming a mask by depositing a masking material at a non-zero angle of inclination relative to a perpendicular to a plane defined by a top surface of the device layer. The mask may be formed over the plurality of patterning structures without being formed along the second sidewall. The method may further include selectively forming a metal layer along the second sidewall of each of the plurality of patterning structures.
1. A method, comprising:
providing a plurality of patterning structures over a device layer, each of the plurality of patterning structures including a first sidewall, a second sidewall, and an upper surface;
forming a mask by depositing a masking material at a non-zero angle of inclination relative to a perpendicular to a plane defined by a top surface of the device layer, wherein the mask is formed over just the first sidewall and the upper surface of each of the plurality of patterning structures;
selectively forming a metal layer along the second sidewall of each of the plurality of patterning structures; and
forming a fill material over the plurality of patterning structures and the device layer; and
planarizing the fill material and the mask to remove the mask from the upper surface of each of the plurality of patterning structures.
2. The method of claim 1 , further comprising:
removing the plurality of patterning structures and the mask along the first sidewall of each of the plurality of patterning structures; and
forming a second fill material between each of the metal layers.
3. The method of claim 2 , further comprising planarizing the second fill material after the second fill material is deposited over each of the metal layers and the fill material.
4. The method of claim 2 , further comprising forming each of the metal layers between the fill material and the second fill material.
5. The method of claim 1 , further comprising selectively forming the metal layer by an atomic layer deposition process.
6. The method of claim 1 , further comprising forming the metal layer along just the second sidewall of each of the plurality of patterning structures.
7. The method of claim 1 , wherein the masking material is prevented from impacting the top surface of the device layer in an area directly adjacent the second sidewall of each of the plurality of patterning structures.
8. The method of claim 1 , further comprising forming a seed layer over the plurality of patterning structures and the device layer, wherein the mask and the metal layer are formed atop the seed layer.
9. A method of forming a semiconductor device, comprising:
providing a plurality of patterning structures over a device layer, each of the plurality of patterning structures including a first sidewall, a second sidewall, and an upper surface;
forming a mask by depositing a masking material at a non-zero angle of inclination relative to a perpendicular to a plane defined by a top surface of the device layer, wherein the mask is formed over just the first sidewall and the upper surface of each of the plurality of patterning structures;
forming a metal layer along just the second sidewall of each of the plurality of patterning structures;
forming a fill material over the plurality of patterning structures and the device layer; and
planarizing the fill material and the mask to remove the mask from the upper surface of each of the plurality of patterning structures.
10. The method of claim 9 , further comprising:
removing the plurality of patterning structures and the mask along the first sidewall of each of the plurality of patterning structures; and
forming a second fill material between each of the metal layers.
11. The method of claim 10 , further comprising planarizing the second fill material after the second fill material is deposited over each of the metal layers and over the fill material.
12. The method of claim 11 , further comprising forming each of the metal layers between the fill material and the second fill material.
13. The method of claim 9 , further comprising selectively forming the metal layer by an atomic layer deposition process.
14. The method of claim 9 , further comprising delivering the masking material at the non-zero angle of inclination to prevent the mask from being formed along a portion of the top surface of the device layer in an area directly adjacent the second sidewall of each of the plurality of pattering features.
15. The method of claim 9 , further comprising forming a seed layer over each of the plurality of patterning structures and over the top surface of the device layer, wherein the mask and the metal layer are formed atop the seed layer.
16. A metal line patterning method, comprising:
providing a plurality of patterning structures over a device layer, each of the plurality of patterning structures including a first sidewall, a second sidewall, and an upper surface;
forming a mask over each of the plurality of patterning structures by depositing a masking material at a non-zero angle of inclination relative to a perpendicular to a plane defined by a top surface of the device layer, wherein the masking material impacts just the first sidewall and the upper surface of each of the plurality of patterning structures;
selectively forming a metal layer along just the second sidewall of each of the plurality of patterning structures;
forming a fill material over the plurality of patterning structures and the device layer; and
planarizing the fill material and the mask to remove the mask from the upper surface of each of the plurality of patterning structures.
17. The method of claim 16 , further comprising:
removing the plurality of patterning structures and the mask along the first sidewall of each of the plurality of patterning structures; and
forming a second fill material between each of the metal layers.
18. The method of claim 16 , further comprising forming the metal layer along the second sidewall by an atomic layer deposition process.
19. The method of claim 16 , further comprising preventing the masking material from impacting the top surface of the device layer in an area directly adjacent the second sidewall of each of the patterning structures.