Low resistance source drain contact formation with trench metastable alloys and laser annealing
Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×10 21 atoms per cubic centimeter (at./cm 3 ). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.
1. A device comprising:
an n-type transistor on a substrate, the transistor comprising at least one gate stack, source and drain regions on opposite sides of the at least one gate stack, and spacers in continuous and direct physical contact with a top and opposing sidewalls of the at least one gate stack;
a dielectric over the transistor, wherein the dielectric extends horizontally over the at least one gate stack and the spacers, and wherein the dielectric is present alongside and under a bottom of at least one of the spacers;
contact trenches in the dielectric that extend down to the source and drain regions;
an epitaxial material in the contact trenches on the source and drain regions; and
a crystalline phosphorous-doped layer in the contact trenches on the epitaxial material, wherein the crystalline phosphorous-doped layer has a homogenous phosphorous concentration that is greater than about 1.5×10 21 at./cm 3 , and wherein both the epitaxial material and the crystalline phosphorous-doped layer are present entirely within the contact trenches and are below a top of the at least one gate stack.
2. The device of claim 1 , wherein the phosphorous concentration is from about 4×10 21 at./cm 3 to about 1×10 22 at./cm 3 , and ranges therebetween.
3. The device of claim 1 , wherein the epitaxial material comprises phosphorous doped silicon.
4. The device of claim 1 , wherein the epitaxial material has a formula Si 1-x P x .
5. The device of claim 1 , further comprising:
a metal liner lining the contact trenches, wherein the metal liner is in direct contact with both the dielectric and the spacers.
6. The device of claim 5 , wherein the metal liner comprises:
a titanium layer on the crystalline phosphorous-doped layer, wherein the titanium layer is present only at a bottom of the contact trenches; and
a titanium nitride layer on the titanium layer, wherein the titanium nitride layer is present at the bottom and along sidewalls of the contact trenches.
7. The device of claim 5 , further comprising:
a gap fill metal filling the contact trenches over the metal liner.
8. The device of claim 7 , wherein the gap fill metal comprises a metal selected from the group consisting of tungsten, cobalt, and combinations thereof.
9. A device comprising:
an n-type transistor on a substrate, the transistor comprising at least one gate stack, source and drain regions on opposite sides of the at least one gate stack, and spacers in continuous and direct physical contact with a top and opposing sidewalls of the at least one gate stack;
a dielectric over the transistor, wherein the dielectric extends horizontally over the at least one gate stack and the spacers, and wherein the dielectric is present alongside and under a bottom of at least one of the spacers;
contact trenches in the dielectric that extend down to the source and drain regions; and
a metal silicide layer in the contact trenches on the source and drain regions, wherein the metal silicide layer has a homogenous phosphorous concentration that is greater than about 1.5×10 21 at./cm 3 , and wherein the metal silicide layer is present entirely within the contact trenches and is below a top of the at least one gate stack.
10. The device of claim 9 , wherein the phosphorous concentration is from about 4×10 21 at./cm 3 to about 1×10 22 at./cm 3 , and ranges therebetween.
11. The device of claim 9 , further comprising:
a metal liner lining the contact trenches, wherein the metal liner is in direct contact with both the dielectric and the spacers.
12. The device of claim 11 , wherein the metal liner comprises:
a titanium layer on the metal silicide layer, wherein the titanium layer is present only at a bottom of the contact trenches; and
a titanium nitride layer on the titanium layer, wherein the titanium nitride layer is present at the bottom and along sidewalls of the contact trenches.
13. The device of claim 11 , further comprising:
a gap fill metal over the metal liner filling the contact trenches.
14. The device of claim 13 , wherein the gap fill metal comprises a metal selected from the group consisting of tungsten, cobalt, and combinations thereof.
15. The device of claim 9 , wherein the metal silicide layer comprises titanium (Ti).
16. The device of claim 15 , wherein the metal silicide layer has a formula TiSi x .
17. A device comprising:
an n-type transistor on a substrate, the transistor comprising at least one gate stack, source and drain regions on opposite sides of the at least one gate stack, and spacers in continuous and direct physical contact with a top and opposing sidewalls of the at least one gate stack;
a dielectric over the transistor, wherein the dielectric extends horizontally over the at least one gate stack and the spacers, and wherein the dielectric is present alongside and under a bottom of at least one of the spacers;
contact trenches in the dielectric that extend down to the source and drain regions;
a metal silicide layer in the contact trenches on the source and drain regions, wherein the metal silicide layer has a homogenous phosphorous concentration that is greater than about 1.5×10 21 at./cm 3 , and wherein the metal silicide layer is present entirely within the contact trenches and is below a top of the at least one gate stack;
a metal liner lining the contact trenches, wherein the metal liner is in direct contact with both the dielectric and the spacers; and
a gap fill metal over the metal liner filling the contact trenches.
18. The device of claim 17 , wherein the phosphorous concentration is from about 4×10 21 at./cm 3 to about 1×10 22 at./cm 3 , and ranges therebetween.
19. The device of claim 17 , wherein the metal liner comprises:
a titanium layer on the metal silicide layer, wherein the titanium layer is present only at a bottom of the contact trenches; and
a titanium nitride layer on the titanium layer, wherein the titanium nitride layer is present at the bottom and along sidewalls of the contact trenches.
20. The device of claim 17 , wherein the gap fill metal comprises a metal selected from the group consisting of tungsten, cobalt, and combinations thereof.