Non-linear neural network equalizer for high-speed data channel

1. A receiver for use in a data channel on an integrated circuit device, the receiver comprising:

a non-linear equalizer having as inputs digitized samples of signals on the data channel;

decision circuitry configured to determine from outputs of the non-linear equalizer a respective value of each of the signals by determining from respective candidate symbols an output symbol and a log-likelihood ratio of the output symbol; and

adaptation circuitry configured to adapt parameters of the non-linear equalizer based on respective ones of the value, the adaptation circuitry comprising:

circuitry configured to determine from the respective candidate symbol a respective output symbol and a log-likelihood ratio of the respective output symbol, and

circuitry configured to minimize cross-entropy between the respective output symbol and the log-likelihood ratio of the respective output symbol.

2. The receiver of claim 1 further comprising feedback circuitry configured to feed back, to an input of the non-linear equalizer, a value output by the decision circuitry to mitigate inter-symbol interference.

3. The receiver of claim 2 wherein the feedback circuitry comprises a decision-feedback equalizer.

4. The receiver of claim 1 wherein the non-linear equalizer is a neural network equalizer.

5. The receiver of claim 4 wherein the neural network equalizer is a multi-layer perceptron neural network equalizer.

6. The receiver of claim 5 wherein the multi-layer perceptron neural network equalizer is a reduced complexity multi-layer perceptron neural network equalizer.

7. The receiver of claim 1 wherein the decision circuitry comprises thresholding circuitry.

8. The receiver of claim 7 wherein:

the decision circuitry operates on symbols; and

the thresholding circuitry has a plurality of thresholds and selects a symbol from a plurality of symbols based on values of outputs of the non-linear equalizer relative to the thresholds.

9. The receiver of claim 7 wherein:

the decision circuitry operates on bits;

the non-linear equalizer outputs a probability estimate for each bit; and

the thresholding circuitry assigns a value to each bit based on a comparison of the probability estimate to 0.5.

10. The receiver of claim 1 wherein the non-linear equalizer comprises a linear filter and an non-linear activation function.

11. The receiver of claim 10 wherein the non-linear activation function is a hyperbolic tangent function.

12. The receiver of claim 10 wherein the non-linear activation function is a sigmoid function.

13. A method for detecting data on a data channel on an integrated circuit device, the method comprising:

performing non-linear equalization of digitized samples of input signals on the data channel;

determining from output signals of the non-linear equalization a respective value of each of the output signals, each respective value representing a respective candidate symbol; and

adapting parameters of the non-linear equalization based on respective ones of the value, by:

determining from each respective candidate symbol an output symbol and a log-likelihood ratio of the output symbol, and

minimizing cross-entropy between the output symbol and the log-likelihood ratio of the output symbol.

14. The method of claim 13 further comprising feeding back, to an input of the non-linear equalization, one of the respective values output by the determining, to mitigate inter-symbol interference.

15. The method of claim 13 wherein performing the non-linear equalization comprises:

performing linear equalization; and

applying a non-linear activation function to signals output by the linear equalization.

16. The method of claim 13 wherein:

each respective value output by the determining represents a respective candidate bit of an output symbol;

the determining from each respective candidate symbol a respective output symbol and a log-likelihood ratio of the respective output symbol comprises:

determining from each respective candidate bit a respective output bit and a log-likelihood ratio of the respective output bit; and

the minimizing cross-entropy between the output symbol and the log-likelihood ratio of the output symbol comprises:

minimizing cross-entropy between each respective candidate bit and the log-likelihood ratio of the respective output bit.

17. Apparatus for detecting data on a data channel on an integrated circuit device, the apparatus comprising:

means for performing non-linear equalization of digitized samples of input signals on the data channel;

means for determining, from output signals of the means for performing non-linear equalization, a respective value of each of the output signals, each respective value output by the means for determining representing a respective candidate symbol; and

means for adapting parameters of the non-linear equalization based on respective ones of the value, comprising:

means for determining from the respective candidate symbol a respective output symbol and a log-likelihood ratio of the respective output symbol, and

means for minimizing cross-entropy between the respective output symbol and the log-likelihood ratio of the respective output symbol.

18. The apparatus of claim 17 further comprising means for feeding back, to an input of the means for performing non-linear equalization, one of the respective values output by the means for determining, to mitigate inter-symbol interference.

19. The apparatus of claim 17 wherein the means for performing the non-linear equalization comprises:

means for performing linear equalization; and

means for applying a non-linear activation function to signals output by the means for performing linear equalization.

20. The apparatus of claim 17 wherein:

each respective value output by the means for determining represents a respective candidate bit of an output symbol;

the means for determining from the respective candidate symbols an output symbol and a log-likelihood ratio of the output symbol comprises means for determining from each respective candidate bit a respective output bit and a log-likelihood ratio of the respective output bit, and

the means for minimizing cross-entropy between the output symbol and the log-likelihood ratio of the output symbol comprises means for minimizing cross-entropy between each respective candidate bit and the log-likelihood ratio of the respective output bit.