IP Library › Granted Patent US 11,573,734
Granted Patent B2
US 11,573,734 · App. 16/732,333 · Granted Feb 7, 2023

Method for improving read-retry of flash memory and related controller and storage device

Inventors: Jian-Dong Du (Taoyuan, TW); Pi-Ju Tsai (New Taipei, TW); Tsung-Chieh Yang (Hsinchu, TW)
Assignee: Silicon Motion, Inc.
G06F3/0659G06F3/0619G06F3/0652G06F3/0679G06F11/0727G06F11/0751G06F11/0793
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Quick Facts
Patent No.
US 11,573,734
App. No.
16/732,333
Granted
Feb 7, 2023
Kind
B2
Abstract

The present invention proposes a method for managing a plurality of memory units in a flash memory module. The method includes: creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit; selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and performing a first refresh operation according to program timestamps of first memory units that have been written with data.

Claims (51)

1. A method for managing a plurality of memory units in a flash memory module, comprising:

creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit;

selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and

performing a first refresh operation according to program timestamps of first memory units that have been written with data, comprising:

executing the first refresh operation on a specific first memory unit when the programed timestamp indicates a time elapsed after the specific first memory unit is written or updated exceeds a threshold; and

executing the first refresh operation in a second employment history, for a plurality of first memory units that have been written with data in a first employment history, wherein the second employment history lags behind the first employment history, and the first refresh operation completes refreshing for all first memory units during the second employment history.

2. The method of claim 1 , further comprising:

performing an error check upon at least one portion of each of a plurality of second memory units that have been written with data; and

performing a second refresh operation according to a result of the error check.

3. The method of claim 2 , wherein performing the second refresh operation according to the result of the error check comprises:

when a result of the error check indicates that a number of error bits in at least one portion of a second memory unit is greater than a threshold, reading data stored in a first memory unit that comprises the second memory unit, and correct the data and write corrected data into another first memory unit; and

creating a programed timestamp associated with the other first memory unit.

4. The method of claim 1 , wherein selecting the corresponding read-retry table comprises:

selecting a first read-retry table based on reading first memory units that have been written with data during the first employment history; and

selecting a second read-retry table based on reading first memory units that have been written with data during the second employment history.

5. The method of claim 1 , wherein performing the first refresh operation comprises:

performing following steps for said each first memory unit:

reading data stored in said each first memory unit, and writing the data into another first memory unit; and

creating a programed timestamp of the other first memory unit.

6. A controller for managing a plurality of memory units of a flash memory, comprising:

a storage unit, for storing a program code; and

a processing unit, coupled to the storage unit, the processing unit arranged to read the program code from the storage unit, in order to execute the program code to perform following operations:

creating a programed timestamp correspond to each first memory unit for a data-written time of said each first memory unit;

selecting a corresponding read-retry table to perform a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit;

executing a first refresh operation according to programed timestamps of first memory units that have been written with data;

executing the first refresh operation on a specific first memory unit when the programed timestamp indicates a time elapsed after the specific first memory unit is written or updated exceeds a threshold; and

executing the first refresh operation in a second employment history for a plurality of first memory units that have been written with data in a first employment history, wherein the second employment history lags behind the first employment history, and the first refresh operation completes refreshing on all first memory units during the second employment history.

7. The controller of claim 6 , wherein the processing unit executes the program code in order to perform an error check for at least one portion of each second memory unit that has been written with data, and executes a second refresh operation according to a result of the error check.

8. The controller of claim 7 , wherein the processing unit executes the program code in order to read the data stored in a first memory unit of the second memory unit when a result of the error check indicates that a number of error bits in at least one portion of a second memory unit is greater than a threshold, and the processing unit corrects the data and writes corrected data to another first memory unit; and the processing unit creates a programed timestamp of the other first memory unit.

9. The controller of claim 6 , wherein the processing unit executes the program code to perform following steps:

selecting a first read-retry table based on reading first memory units that have been written with data during the first employment history; and

selecting a second read-retry table based on reading first memory units that have been written with data during the second employment history.

10. The controller of claim 6 , wherein the processing unit executes the program code to perform following steps upon said each first memory unit:

reading data stored in said each first memory unit, and writing the data into another first memory unit; and

creating a programed timestamp of the other first memory unit.

11. A storage device, comprises:

a flash memory module, comprising a plurality of memory units; and

a controller, arranged to access flash memory module, the controller comprising:

a storage unit, arranged to store a program code; and

a processing unit, coupled to the storage unit, the processing unit arranged to read the program code from the storage unit in order to execute the program code to perform following operations:

creating a programed timestamp correspond to each first memory unit for a data-written time of said each first memory unit;

selecting a corresponding read-retry table to perform a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and

executing a first refresh operation according to programed timestamps of first memory units that have been written with data;

executing the first refresh operation on a specific first memory unit when the programed timestamp indicates a time elapsed after the specific first memory unit is written or updated exceeds a threshold; and

executing the first refresh operation in a second employment history for a plurality of first memory units that have been written with data in a first employment history, wherein the second employment history lags behind the first employment history, and the first refresh operation refreshes all first memory units during the second employment history.

12. The storage device of claim 11 , wherein the controller further performs an error check upon at least one portion of each second memory unit that have been written with data, and executes a second refresh operation according to a result of the error check.

13. The storage device of claim 12 , wherein when a result of the error check indicates that a number of error bits in at least one portion of a second memory unit is greater than a threshold, the controller reads data stored in a first memory unit that comprises the second memory unit, corrects the data and writes corrected data into another first memory unit, and creates a programed timestamp of the other first memory unit.

14. The storage device of claim 11 , wherein the controller selects a first read-retry table for first memory units that have been written with data during the first employment history; and the controller selects a second read-retry table for first memory units that have been written with data during the second employment history.

15. The storage device of claim 11 , wherein the controller performs following operations upon each first memory unit:

reading data stored in said each first memory unit, and writing the data into another first memory unit; and

creating a programed timestamp of the other first memory unit in order to complete the first refresh operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 1, 2020
From: DU, JIAN-DONG; TSAI, PI-JU; YANG, TSUNG-CHIEH
To: SILICON MOTION, INC.
Reel/Frame 051396/0690 →
Priority Claims (1)
TW 108100961 · Jan 10, 2019 · national
Continuity (1)
Related Publication 20200225876A1 · Jul 16, 2020