Semiconductor device including voltage monitoring circuit for monitoring a voltage state of the semiconductor device

1. A semiconductor device comprising:

a first pad to which a first external voltage as a reference voltage is applicable;

a comparison circuit including a first input terminal connected to the first pad, a second input terminal to which a second voltage is applicable, and an output terminal configured to output a comparison result between the first external voltage and the second voltage; and

a control circuit configured to output, external to the semiconductor device, a signal based on the comparison result.

2. The semiconductor device according to claim 1 , wherein

the control circuit is configured to output the signal based on a change in the first external voltage.

3. The semiconductor device according to claim 2 , wherein

the control circuit is configured to

determine whether the second voltage is larger than the first external voltage,

output, external to the semiconductor device, a first signal instructing to step up the first external voltage when it is determined that the second voltage is larger than the first external voltage, and

output, external to the semiconductor device, a second signal instructing to end application of the first external voltage when it is determined that the second voltage is equal to or smaller than the first external voltage.

4. The semiconductor device according to claim 2 , wherein

the control circuit is configured to

determine whether the second voltage is larger than the first external voltage,

output, external to the storage device, a first signal instructing to end application of the first external voltage when it is determined that the second voltage is larger than the first external voltage, and

output, external to the semiconductor device, a second signal instructing to step down the first external voltage when it is determined that the second voltage is equal to or smaller than the first external voltage.

5. The semiconductor device according to claim 1 , wherein

the comparison circuit comprises a first transistor connected to a first node, and

the first input terminal of the comparison circuit is a gate of the first transistor.

6. The semiconductor device according to claim 5 , wherein

the comparison circuit comprises a second transistor connected to the first node, and

the second input terminal of the comparison circuit is a gate of the second transistor.

7. The semiconductor device according to claim 1 , further comprising:

a switch having a first terminal connected to the second input terminal; and

a first circuit connected to a second terminal of the switch, wherein

the first circuit is configured to output the second voltage to the second terminal of the switch in response to a first command transmitted from the outside.

8. The semiconductor device according to claim 7 , wherein

the switch is configured to transfer the second voltage to the second input terminal in response to a second command transmitted from the outside.

9. The semiconductor device according to claim 7 , wherein

the switch comprises a transistor, and

the second input terminal of the comparison circuit is a terminal of the transistor of the switch.

10. The semiconductor device according to claim 7 , wherein the first command is a monitoring operation start command.

11. The semiconductor device according to claim 1 , further including;

a circuit including a plurality of transistors, formed on a substrate, and

a memory cell array including a plurality of conductor layers, formed above the circuit.

12. The semiconductor device according to claim 11 , wherein the conductor layers are word lines.

13. A semiconductor device comprising:

a first pad;

a buffer circuit including a first input terminal to which a first voltage is applicable, a second input terminal connected to the first pad, and an output terminal connected to the first pad;

a switch having a first terminal connected to the first input terminal; and

a first circuit connected to a second terminal of the switch, wherein

the first circuit is configured to output the first voltage to the second terminal of the switch in response to a first command transmitted from an outside of the semiconductor device.

14. The semiconductor device according to claim 13 , wherein

the switch is configured to transfer the first voltage to the first input terminal in response to a second command transmitted from the outside.

15. The semiconductor device according to claim 13 , further comprising:

a second circuit provided between the buffer circuit and the first pad, wherein

the second circuit includes

a first resistor having a first terminal connected to the first pad and a second terminal commonly connected to the output terminal and the second input terminal of the buffer circuit, and

a second resistor having a first terminal connected to the first terminal of the first resistor and a second terminal that is grounded.

16. The semiconductor device according to claim 15 , further comprising:

a third resistor and a capacitor that are connected in parallel between the first pad and the first terminal of the first resistor.

17. The semiconductor device according to claim 16 , wherein

the capacitor is a variable capacitor.

18. A semiconductor device comprising:

a first pad;

a buffer circuit including a first input terminal to which a first voltage is applicable, a second input terminal connected to the first pad, and an output terminal connected to the first pad;

a circuit including a plurality of transistors, formed on a substrate, and

a memory cell array including a plurality of conductor layers, formed above the circuit.

19. The semiconductor device according to claim 18 , wherein the conductor layers are word lines.