IP Library › Granted Patent US 11,579,670
Granted Patent B2
US 11,579,670 · App. 16/895,423 · Granted Feb 14, 2023

Array substrate and display panel

Inventors: Yin Deng (Beijing, CN); Hao Luo (Beijing, CN); Ting Li (Beijing, CN); Bo Wu (Beijing, CN); Dongmei Wei (Beijing, CN); Chaoguan Gong (Beijing, CN)
Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
G06F1/189G06F1/1652
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Quick Facts
Patent No.
US 11,579,670
App. No.
16/895,423
Granted
Feb 14, 2023
Kind
B2
Abstract

The present disclosure relates to the field of display technology, and provides an array substrate and a display panel. The array substrate is provided with a via hole and further includes an annular wiring area. The annular wiring area is located around the via hole and is provided with an incision extending toward an outer edge of the annular wiring area along an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the inner edge.

Claims (33)

1. An array substrate, comprising: a via hole; and an annular wiring area located around the via hole, wherein the annular wiring area is provided with an incision extending toward an outer edge of the annular wiring area from an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the incision, the array substrate further comprises a display area continuously located surrounding the annular wiring area in which first signal lines extending in a first direction and second signal lines extending in a second direction perpendicular to the first direction and surrounding the first annular wiring area are provided, wherein a density of the first signal lines is lower than that of the second signal lines; and the annular wiring area and the display area form a display panel and display an image.

2. The array substrate according to claim 1 , wherein:

the annular wiring area comprises a first annular wiring area and a second annular wiring area surrounding the first annular wiring area;

part of the first signal lines extend into the first annular wiring area in the first direction, and extend along the first annular wiring area; and

part of the second signal lines extend into the second annular wiring area in the second direction, and extend along the second annular wiring area.

3. The array substrate according to claim 2 , wherein the incision is located in the first annular wiring area and does not intersect the first signal lines.

4. The array substrate according to claim 3 , wherein:

the first annular wiring area comprises a first semi-annular wiring area and a second semi-annular wiring area which are divided in the first direction;

the first signal lines extending into the first semi-annular wiring area in the first direction extend along the first semi-annular wiring area, and the first signal lines extending into the second semi-annular wiring in the first direction extend along the second semi-annular wiring area, and the first signal lines do not intersect each other; and

the incision is located between an innermost first signal line in the first semi-annular wiring area and an innermost first signal line in the second semi-annular wiring area.

5. The array substrate according to claim 4 , wherein the incision comprises two incisions.

6. The array substrate according to claim 5 , wherein the incisions extend in the first direction and extend to an outer edge of the first annular wiring area.

7. The array substrate according to claim 2 , wherein:

the first signal lines are data lines, and the second signal lines are gate lines; or

the second signal lines are data lines, and the first signal lines are gate lines.

8. The array substrate according to claim 1 , wherein:

the array substrate further comprises a display area located around the annular wiring area, and the display area is provided with first signal lines extending in a first direction; and

part of the first signal lines extend into the annular wiring area in the first direction, and extend along the annular wiring area.

9. The array substrate according to claim 8 , wherein the incision does not intersect the first signal lines.

10. The array substrate according to claim 9 , wherein:

the annular wiring area comprises a first semi-annular wiring area and a second semi-annular wiring area which are divided in the first direction;

the first signal lines extending into the first semi-annular wiring area in the first direction extend along the first semi-annular wiring area, and the first signal lines extending into the second semi-annular wiring in the first direction extend along the second semi-annular wiring area, and the first signal lines do not intersect each other; and

the incision is located between an innermost first signal line in the first semi-annular wiring area and an innermost first signal line in the second semi-annular wiring area.

11. The array substrate according to claim 10 , wherein the incision comprises two incisions.

12. The array substrate according to claim 11 , wherein the incision extends in the first direction.

13. The array substrate according to claim 1 , wherein the incision comprises a plurality of incisions.

14. The array substrate according to claim 1 , wherein the substrate in the annular wiring area is a flexible substrate.

15. The array substrate according to claim 1 , wherein the annular wiring area further comprises an annular sealant area for providing sealant, and the annular sealant area is close to the outer edge of the annular wiring area.

16. The array substrate according to claim 1 , wherein the bent portion of the annular wiring area is parallel to a substrate surface of the array substrate.

17. The array substrate according to claim 1 , wherein an angle formed between the bent portion of the annular wiring area and a back side of the array substrate is an acute angle.

18. The array substrate according to claim 1 , wherein the bent portion of the annular wiring area is perpendicular to a substrate surface of the array substrate.

19. A display panel, comprising: an array substrate, comprising: a via hole; and an annular wiring area located around the via hole, wherein the annular wiring area is provided with an incision extending toward an outer edge of the annular wiring area from an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the incision, the array substrate further comprises a display area continuously located surrounding the annular wiring area in which first signal lines extending in a first direction and second signal lines extending in a second direction perpendicular to the first direction and surrounding the first annular wiring area are provided, wherein a density of the first signal lines is lower than that of the second signal lines; and the annular wiring area and the display area form a display panel and display an image.

20. A method, comprising: providing an array substrate, the array substrate comprising: a via hole; and an annular wiring area located around the via hole, wherein the annular wiring area is provided with an incision extending toward an outer edge of the annular wiring area from an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the incision, the array substrate further comprises a display area continuously located surrounding the annular wiring area in which first signal lines extending in a first direction and second signal lines extending in a second direction perpendicular to the first direction and surrounding the first annular wiring area are provided, wherein a density of the first signal lines is lower than that of the second signal lines; and the annular wiring area and the display area form a display panel and display an image.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2020
From: DENG, YIN; LUO, HAO; LI, TING; WU, BO; WEI, DONGMEI; GONG, CHAOGUAN
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 052962/0801 →
Priority Claims (1)
CN 201911329771.4 · Dec 20, 2019 · national
Continuity (1)
Related Publication 20210191481A1 · Jun 24, 2021