Image sensors
Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors.
1. An image sensor comprising:
a photoelectric conversion element group comprising first, second, third, and fourth photoelectric conversion elements;
first, second, third and fourth transfer gates configured to control transfer of first, second, third and fourth signals provided by the first, second, third and fourth photoelectric conversion elements, respectively;
a floating diffusion region configured to receive the first, second, third or fourth signals;
a first transistor comprising a gate node that is connected to the floating diffusion region;
a second transistor connected to the first transistor; and
a third transistor connected to the floating diffusion region,
wherein the third transistor is in a first region that extends in a first direction,
wherein the first transistor and the second transistor are in a second region that extends in a second direction, and the second direction is perpendicular to the first direction, and
wherein the first transistor and the second transistor are aligned in the second direction.
2. The image sensor of claim 1 , further comprising:
a fourth transistor connected to the first transistor.
3. The image sensor of claim 1 , further comprising:
a fourth transistor connected to the second transistor.
4. The image sensor of claim 1 , wherein the third transistor is a reset transistor that is configured to reset the floating diffusion region to VDD.
5. The image sensor of claim 1 , wherein the first transistor is a source follower that is configured to amplify a potential change in the floating diffusion region and is configured to generate an output voltage.
6. The image sensor of claim 1 , wherein the photoelectric conversion element group comprises a first side extending in the first direction and a second side extending in the second direction, and
the first region extends along the first side of the photoelectric conversion element group, and the second region extends along the second side of the photoelectric conversion element group.
7. The image sensor of claim 1 , wherein the third transistor is spaced apart from the first and second transistors in the first direction.
8. An image sensor comprising:
a photoelectric conversion element group comprising first, second, third, and fourth photoelectric conversion elements;
first, second, third and fourth transfer gates configured to control transfer of first, second, third and fourth signals provided by the first, second, third and fourth photoelectric conversion elements, respectively;
a floating diffusion region configured to receive the first, second, third or fourth signals;
a first transistor comprising a gate node that is connected to the floating diffusion region;
a second transistor connected to the first transistor; and
a third transistor connected to the floating diffusion region,
wherein a length of the first transistor in a first direction is longer than a length of the first transistor in a second direction that is perpendicular to the first direction,
wherein a length of the second transistor in the first direction is longer than a length of the second transistor in the second direction, and
wherein a length of the third transistor in the first direction is shorter than a length of the third transistor in the second direction.
9. The image sensor of claim 8 , further comprising:
a fourth transistor connected to the first transistor.
10. The image sensor of claim 8 , further comprising:
a fourth transistor connected to the second transistor.
11. The image sensor of claim 8 , wherein the third transistor is a reset transistor that is configured to reset the floating diffusion region to VDD.
12. The image sensor of claim 8 , wherein the first transistor is a source follower that is configured to amplify a potential change in the floating diffusion region and is configured to generate an output voltage.