IP Library Granted Patent US 11,587,225
Granted Patent B2
US 11,587,225 · App. 17/410,344 · Granted Feb 21, 2023

Pattern inspection system

Inventors: Shuyang Dou (Tokyo, JP); Shinichi Shinoda (Tokyo, JP); Yasutaka Toyoda (Tokyo, JP); Hiroyuki Shindo (Tokyo, JP)
Assignee: HITACHI HIGH-TECH CORPORATION
G06T7/001G06N20/00G06T7/11G06T7/13G06T7/74G06T7/80G06T2207/10061G06T2207/20081G06T2207/20092G06T2207/30148
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Quick Facts
Patent No.
US 11,587,225
App. No.
17/410,344
Granted
Feb 21, 2023
Kind
B2
Abstract

A pattern inspection system inspects an image of an inspection target pattern of an electronic device using an identifier constituted by machine learning, based on the image of the inspection target pattern of the electronic device and data used to manufacture the inspection target pattern. The system includes a storage unit which stores a plurality of pattern images of the electronic device and pattern data used to manufacture a pattern of the electronic device, and an image selection unit which selects a learning pattern image used in the machine learning from the plurality of pattern images, based on the pattern data and the pattern image stored in the storage unit.

Claims (26)

1. A pattern inspection system which inspects an image of an inspection target pattern of an electronic device using an identifier constituted by machine learning, based on the image of the inspection target pattern of the electronic device and data used to manufacture the inspection target pattern, the system comprising:

a data selection unit which selects a photographing coordinate of a learning pattern used in the machine learning, based on information about photographing the electronic device and pattern data used to manufacture a pattern of the electronic device,

wherein the data selection unit analyzes a shape of a pattern using the pattern data and/or analyzes a position of a pattern on a semiconductor device,

and wherein,

the data selection unit detects a position on the pattern data in which the shape of the same pattern exists, using a plurality of patterns having the same shape detected by analyzing a shape of the pattern and the information about photographing the electronic device, and executes statistical processing using at least one of the detected number, a coordinate position on a semiconductor chip, a coordinate position on a wafer, and distance information between the coordinate position on the semiconductor chip and the coordinate position on the wafer, and the detected position.

2. The pattern inspection system according to claim 1 , wherein

the data selection unit executes statistical processing of the number of pixels of a vertical edge and a horizontal edge based on edge information of a pattern obtained pattern data corresponding to the pattern image obtained by photographing the electronic device to derive the same shape.

3. A pattern inspection system which inspects an image of an inspection target Pattern of an electronic device using an identifier constituted by machine learning, based on the image of the inspection target pattern of the electronic device and data used to manufacture the inspection target pattern, the system comprising:

a data selection unit which selects a photographing coordinate of a learning pattern used in the machine learning, based on information about photographing the electronic device and pattern data used to manufacture a pattern of the electronic device,

wherein

the data selection unit divides the pattern data into small areas corresponding to an imaging field of view of the information about photographing the electronic device, analyzes a shape of a pattern for each divided area, and analyzes a position of the pattern on the electronic device based on a pattern having the same shape as the shape of the analyzed pattern to specify the photographing position.

4. The pattern inspection system according to claim 1 , further comprising:

a recipe creation unit which generates a recipe of a photographing unit based on the coordinate selected by the data selection unit.

5. The pattern inspection system according to claim 4 , further comprising:

an identifier generation unit which executes machine learning based on the learning pattern image photographed by the recipe and a true value data corresponding to the learning pattern image so as to generate the identifier.

6. The pattern inspection system according to claim 5 , further comprising:

a region extraction unit which extracts one of a contour shape of at least a pattern, a pattern region, and a non-pattern region from the image of the inspection target pattern by the identifier.

7. The pattern inspection system according to claim 5 , wherein

the identifier extracts a defect based on the image of the inspection target pattern.

8. The pattern inspection system according to claim 5 , wherein

identification data obtained by the identifier and the pattern data used to manufacture the pattern of the electronic device are compared with each other so as to execute inspection.

9. A pattern inspection method for inspecting an image of an inspection target pattern of an electronic device using an identifier constituted by machine learning, based on the image of the inspection target pattern of the electronic device and data used to manufacture the inspection target pattern, the method comprising:

selecting a photographing coordinate of a learning pattern used in the machine learning, based on information about photographing the electronic device and pattern data used to manufacture a pattern of the electronic device,

analyzing a shape of a pattern using the pattern data and/or analyzes a position of a pattern on a semiconductor device,

detecting a position on the pattern data in which the shape of the same pattern exists, using a plurality of patterns having the same shape detected by analyzing a shape of the pattern and the information about photographing the electronic device, and

executing statistical processing using at least one of the detected number, a coordinate position on a semiconductor chip, a coordinate position on a wafer, and distance information between the coordinate position on the semiconductor chip and the coordinate position on the wafer, and the detected position.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2022
From: DOU, SHUYANG; SHINODA, SHINICHI; TOYODA, YASUTAKA; SHINDO, HIROYUKI
To: HITACHI HIGH-TECHNOLOGIES CORPORATION
Reel/Frame 062173/0830 →
Priority Claims (1)
JP JP2018-162607 · Aug 31, 2018 · national
Continuity (2)
Continuation 16557175 · Aug 30, 2019
Related Publication 20210383524A1 · Dec 9, 2021