IP Library › Granted Patent US 11,587,518
Granted Patent B2
US 11,587,518 · App. 16/955,306 · Granted Feb 21, 2023

Display device, semiconductor device, and electronic device

Inventors: Kei Takahashi (Kanagawa, JP); Koji Kusunoki (Kanagawa, JP); Susumu Kawashima (Kanagawa, JP); Shigeru Onoya (Kanagawa, JP); Takahiro Fukutome (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
G09G3/36G09G3/3233G09G3/3275
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Quick Facts
Patent No.
US 11,587,518
App. No.
16/955,306
Granted
Feb 21, 2023
Kind
B2
Abstract

A semiconductor device includes a display device and a source driver. Each of a plurality of pixels included in the display device is supplied with a first data potential and a second data potential included in a range of a first potential or higher to a second potential or lower. The first data potential makes the pixel display an image with a first gray level. The pixel performs calculation with the first data potential and the second data potential to generate a third data potential. The third data potential makes the pixel display an image with a second gray level. A reference potential of the first data potential is an intermediate potential between the first potential and the second potential, and the gray level width that can be displayed by the second data potential is larger than the gray level width that can be displayed by the first data potential.

Claims (27)

1. A semiconductor device comprising:

a display device;

a source driver;

a first wiring; and

a second wiring,

wherein the display device comprises a pixel,

wherein the source driver comprises a digital-analog converter circuit, a buffer circuit, a first switch, a second switch, a third switch, a fourth switch, and a switch control circuit,

wherein the pixel is electrically connected to the first wiring and the second wiring,

wherein the digital-analog converter circuit comprises a first output terminal, a second output terminal, and a third output terminal,

wherein the first output terminal is electrically connected to a first input terminal included in the buffer circuit,

wherein an output terminal of the buffer circuit is electrically connected to one electrode of the third switch, one electrode of the fourth switch, and a second input terminal included in the buffer circuit,

wherein the second output terminal is electrically connected to one electrode of the first switch,

wherein the third output terminal is electrically connected to one electrode of the second switch,

wherein the first wiring is electrically connected to the other electrode of the fourth switch,

wherein the second wiring is electrically connected to the other electrode of the first switch, the other electrode of the second switch, and the other electrode of the third switch,

wherein the switch control circuit is configured to control the first switch, the second switch, the third switch, and the fourth switch independently,

wherein the first output terminal is configured to output a voltage in a range of a first potential to a second potential,

wherein the second output terminal is configured to output the first potential,

wherein the third output terminal is configured to output the second potential,

wherein the pixel comprises a first transistor, a second transistor, a first capacitor, a second capacitor, and a display element,

wherein one of a source and a drain of the first transistor is electrically connected to the first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to one electrode of the first capacitor, one electrode of the second capacitor, and one electrode of the display element,

wherein one of a source and a drain of the second transistor is electrically connected to the second wiring, and

wherein the other of the source and the drain of the second transistor is electrically connected to the other electrode of the second capacitor.

2. An electronic device comprising the semiconductor device according to claim 1 , and a temperature sensor.

3. The display device according to claim 1 , wherein the display element is a liquid crystal element.

4. The display device according to claim 1 , wherein the first transistor or the second transistor comprises a metal oxide in a semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2020
From: TAKAHASHI, KEI; KUSUNOKI, KOJI; KAWASHIMA, SUSUMU; ONOYA, SIGERU; FUKUTOME, TAKAHIRO; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 052977/0205 →
Priority Claims (2)
JP JP2017-245920 · Dec 22, 2017 · national
JP JP2018-027234 · Feb 19, 2018 · national
Continuity (1)
Related Publication 20210090513A1 · Mar 25, 2021