Semiconductor device and method of manufacturing same

1. A semiconductor device comprising:

a first chip including:

a memory cell array;

a first insulator;

a plurality of interconnections provided in the first insulator and above the memory cell array, respectively extending in a first direction, and arranged in a second direction crossing the first direction;

a second insulator provided on and above the first insulator and the plurality of interconnections;

a conductor provided on and above a first interconnection among the plurality of interconnections and having a shape that is projected upwardly with respect to the first interconnection in the second insulator; and

a plug provided on the first interconnection via the conductor;

a second chip bonded to the first chip, and including a substrate and a transistor provided on the substrate; and

a metal pad provided above the plug, electrically connected to the plug, and provided on a bonding surface of the first chip and the second chip, the metal pad electrically connecting the transistor to the memory cell array.

2. The device of claim 1 , wherein a lower end of a contact face between the conductor and the plug is provided at a position higher than an upper face of the first interconnection.

3. The device of claim 1 , wherein a lower end of a contact face between the conductor and the plug is provided at a position lower than an upper end of the conductor.

4. The device of claim 3 , wherein an upper face of the plug has an area larger than an area of a lower face of the conductor.

5. The device of claim 3 , wherein

the plurality of interconnections each includes a portion having a first width and a portion having a second width that is larger than the first width, and

the conductor is provided on the portion having the second width.

6. The device of claim 3 , wherein

the plurality of interconnections each includes first and second portions each having a first width, and a third portion provided between the first portion and the second portion and having a second width that is larger than the first width, and

the conductor is provided on the third portion of the first interconnection.

7. The device of claim 6 , wherein

the first portion extends in a first direction, and is connected to the third portion at a first point,

the second portion extends in the first direction, and is connected to the third portion at a second point, and

a position of the first point is deviated from a position of the second point in a second direction that is perpendicular to the first direction.

8. The device of claim 7 , wherein

the plurality of interconnections include a second interconnection that is adjacent with the first interconnection,

the first interconnection includes the first and second portions each having the first width, and the third portion provided between the first portion and the second portion and having the second width that is larger than the first width,

the second interconnection includes the first and second portions each having the first width, and the third portion provided between the first portion and the second portion and having the second width that is larger than the first width, and

a position of the third portion of the second interconnection is deviated from a position of the third portion of the first interconnection in the first direction.