Block allocation and erase techniques for sequentially-written memory devices

1. A system comprising:

a memory device; and

a processing device, operatively coupled with the memory device, to perform operations comprising:

maintaining a plurality of zone reset counters, wherein a zone reset counter of the plurality of zone reset counters represents a number of times a respective zone of the memory device has been reset;

maintaining a global reset counter for the memory device, wherein the global reset counter represents a measure of central tendency of the plurality of zone reset counters;

responsive to receiving a write command directed to a target zone of the memory device, determining whether a target portion of the target zone is open;

responsive to determining that the target portion of the target zone is not open, comparing a value of the zone reset counter of the target zone to a value of the global reset counter; and

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone equals or exceeds the value of the global reset counter, allocating, to the target zone, a first portion from a free block list, wherein the first portion has a lowest program erase count among one or more portions in the free block list.

2. The system of claim 1 , further comprising:

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone is less than the value of the global reset counter, allocating, to the target zone, a second portion from the free block list, wherein the second portion has a highest program erase count among the one or more portions in the free block list.

3. The system of claim 1 , further comprising:

responsive to receiving a zone reset command directed to a particular zone of the memory device, identifying one or more portions associated with the particular zone;

adding the one or more identified portions associated with the particular zone to a media management pool; and

incrementing the zone reset counter associated with the particular zone.

4. The system of claim 1 , further comprising:

responsive to a triggering event, determining the value of the global reset counter by calculating an average of the values of the plurality of zone reset counters.

5. The system of claim 1 , further comprising:

responsive to determining that the free block list is empty, determining whether a block stripe erase cycle has been triggered;

responsive to determining that the block stripe erase cycle has been triggered, reducing a threshold capacity by a first value; and

responsive to determining that the block stripe erase cycle has not been triggered, reducing the threshold capacity by a second value.

6. The system of claim 1 , further comprising:

responsive to determining that the free block list is full, increasing a threshold capacity by a value.

7. The system of claim 1 , further comprising:

determining a value of a voltage distribution metric associated with the first portion; and

responsive to determining that the value of the voltage distribution metric associated with the first portion satisfies a voltage distribution criterion, performing a media management operation with respect to one or more blocks associated with the first portion.

8. The system of claim 7 , further comprising:

maintaining a media management counter associated with the memory device, wherein the media management counter represents a number of media management operations performed with respect to the one or more portions associated with the free block list over a certain period of time; and

responsive to determining that the media management counter satisfies a media management criterion, increasing a threshold capacity by a value.

9. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

maintaining a plurality of zone reset counters, wherein a zone reset counter of the plurality of zone reset counters represents a number of times a respective zone of a memory device has been reset;

maintaining a global reset counter for the memory device, wherein the global reset counter represents a measure of central tendency of the plurality of zone reset counters;

responsive to receiving a write command directed to a target zone of the memory device, determining whether a target portion of the target zone is open;

responsive to determining that the target portion of the target zone is not open, comparing a value of the zone reset counter of the target zone to a value of the global reset counter; and

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone equals or exceeds the value of the global reset counter, allocating, to the target zone, a first portion from a free block list, wherein the first portion has a lowest program erase count among one or more portions in the free block list.

10. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone is less than the value of the global reset counter, allocating, to the target zone, a second portion from the free block list, wherein the second portion has a highest program erase count among the one or more portions in the free block list.

11. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

responsive to receiving a zone reset command directed to a particular zone of the memory device, identifying one or more portions associated with the particular zone;

adding the one or more identified portions associated with the particular zone to a media management pool; and

incrementing the zone reset counter associated with the particular zone.

12. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

responsive to a triggering event, determining the value of the global reset counter by calculating an average of the values of the plurality of zone reset counters.

13. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

responsive to determining that the free block list is empty, determining whether a block stripe erase cycle has been triggered;

responsive to determining that the block stripe erase cycle has been triggered, reducing a threshold capacity by a first value; and

responsive to determining that the block stripe erase cycle has not been triggered, reducing the threshold capacity by a second value.

14. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

responsive to determining that the free block list is full, increasing a threshold capacity by a value.

15. The non-transitory computer-readable storage medium of claim 9 , wherein the processing device is to perform operations further comprising:

determining a value of a voltage distribution metric associated with the first portion; and

responsive to determining that the value of the voltage distribution metric associated with the first portion satisfies a voltage distribution criterion, performing a media management operation with respect to one or more blocks associated with the first portion.

16. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is to perform operations further comprising:

maintaining a media management counter associated with the memory device, wherein the media management counter represents a number of media management operations performed with respect to the one or more portions associated with the free block list over a certain period of time; and

responsive to determining that the media management counter satisfies a media management criterion, increasing a threshold capacity by a value.

17. A method comprising:

maintaining a plurality of zone reset counters, wherein a zone reset counter of the plurality of zone reset counters represents a number of times a respective zone of a memory device has been reset;

maintaining a global reset counter for the memory device, wherein the global reset counter represents a measure of central tendency of the plurality of zone reset counters;

responsive to receiving a write command directed to a target zone of the memory device, determining whether a target portion of the target zone is open;

responsive to determining that the target portion of the target zone is not open, comparing a value of the zone reset counter of the target zone to a value of the global reset counter; and

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone equals or exceeds the value of the global reset counter, allocating, to the target zone, a first portion from a free block list, wherein the first portion has a lowest program erase count among one or more portions in the free block list.

18. The method of claim 17 , further comprising:

responsive to determining, based on the comparing, that the value of the zone reset counter of the target zone is less than the value of the global reset counter, allocating, to the target zone, a second portion from the free block list, wherein the second portion has a highest program erase count among the one or more portions in the free block list.

19. The method of claim 17 , further comprising:

responsive to receiving a zone reset command directed to a particular zone of the memory device, identifying one or more portions associated with the particular zone;

adding the one or more identified portions associated with the particular zone to a media management pool; and

incrementing the zone reset counter associated with the particular zone.

20. The method of claim 17 , further comprising:

responsive to determining that the free block list is empty, determining whether a block stripe erase cycle has been triggered;

responsive to determining that the block stripe erase cycle has been triggered, reducing a threshold capacity by a first value; and

responsive to determining that the block stripe erase cycle has not been triggered, reducing the threshold capacity by a second value.