IP Library › Granted Patent US 11,594,161
Granted Patent B2
US 11,594,161 · App. 17/241,607 · Granted Feb 28, 2023

Sensor and display device

Inventor: Kenichi Takatori (Yokohama, JP)
Assignee: HUAWEI TECHNOLOGIES CO., LTD.
G09G3/006G09G3/3233H04N5/359G09G2300/0426G09G2360/148
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Quick Facts
Patent No.
US 11,594,161
App. No.
17/241,607
Granted
Feb 28, 2023
Kind
B2
Abstract

A sensor includes a plurality of electric lines including row lines and column lines, a photodiode in a pixel, a drain of a first transistor connected to the photodiode in the pixel, a drain of a second transistor connected in series with a source of the first transistor in the pixel, a source of the second transistor being connected to a column line among the plurality of electric lines, and both a gate of the first transistor and a gate of the second transistor being connected to a row line among the plurality of electric lines, wherein a channel material of the first transistor is different from a channel material of the second transistor.

Claims (68)

1. A sensor comprising:

a plurality of electric lines comprising row lines and column lines;

a photodiode corresponding to a pixel of a pixel array;

a first transistor comprising a first gate, a first source, and a first drain, wherein the first drain is coupled to the photodiode, and wherein the first transistor is an oxide thin-film transistor (TFT); and

a second transistor comprising a second gate, a second source, and a second drain,

wherein the second transistor is a poly-silicon (Si) TFT,

wherein the poly-Si TFT comprises a twin-gated structure,

wherein the twin-gated structure comprises a split gate,

wherein the second drain is coupled in series with the first source,

wherein the second source is coupled to a first column line among the column lines,

wherein the first gate and the second gate are coupled to a same electric line among the electric lines, and

wherein a first channel material of the first transistor is different from a second channel material of the second transistor.

2. The sensor of claim 1 , wherein the first channel material is an oxide and the second channel material is a non-oxide.

3. The sensor of claim 1 , wherein the photodiode comprises a cathode, and wherein the oxide TFT is arranged between the cathode and the poly-Si TFT.

4. The sensor of claim 1 , wherein the oxide TFT comprises a tied dual-gated structure comprising top gates and bottom gates, and wherein the top gates and the bottom gates are coupled to a same electric line among the electric lines.

5. The sensor of claim 1 , wherein the oxide TFT comprises a dual-gated structure comprising:

a top gate coupled to a first line among the electric lines; and

a bottom gate coupled to a second line among the electric lines, and wherein the first line and the second line are different.

6. The sensor of claim 1 , wherein the first transistor is a bottom gate transistor and the second transistor is a top gate transistor.

7. The sensor of claim 1 , wherein the first transistor and the second transistor are top gate transistors, and wherein the second transistor is disposed in a first layer that is lower than a second layer in which the first transistor is disposed.

8. The sensor of claim 7 , further comprising a light shield layer located under the first transistor, wherein the light shield layer comprises a same material as a gate material of the second gate.

9. A sensor comprising:

a plurality of electric lines comprising row lines, column lines, and reset lines;

a photodiode corresponding to a pixel of a pixel array;

a readout transistor portion between the photodiode and a column line among the electric lines, wherein the readout transistor portion comprises a gate coupled to a first row line among the row lines;

a first transistor comprising a first gate, a first source, and a first drain, wherein the first drain is coupled to the photodiode; and

a second transistor comprising a second gate, a second source, and a second drain,

wherein the second drain is coupled in series with the first source,

wherein the first gate and the second gate are coupled to a first reset line of the reset lines, and

wherein a first channel material of the first transistor is different from a second channel material of the second transistor.

10. The sensor of claim 9 , wherein the first channel material is an oxide and the second channel material is a non-oxide.

11. The sensor of claim 10 , wherein the first transistor is an Oxide thin-film transistor (TFT) and the second transistor is a poly-silicon (Si) TFT.

12. The sensor of claim 11 , wherein the photodiode comprises a cathode, wherein the Oxide TFT is arranged between the cathode and the poly-Si TFT.

13. The sensor of claim 11 , wherein the poly-Si TFT comprises a twin-gated structure, and wherein the twin-gated structure comprises a split gate.

14. A display device comprising:

a sensor comprising:

a plurality of electric lines comprising row lines and column lines;

a photodiode corresponding to a pixel of a pixel array;

a first transistor comprising a first gate, a first source, and a first drain, wherein the first drain is coupled to the photodiode, and wherein the first transistor is an oxide thin-film transistor (TFT); and

a second transistor comprising a second gate, a second source, and a second drain,

wherein the second transistor is a poly-silicon (Si) TFT,

wherein the poly-Si TFT comprises a twin-gated structure,

wherein the twin-gated structure comprises a split gate,

wherein the second drain is coupled in series with the first source,

wherein the second source is coupled to a first column line among the column lines,

wherein the first gate and the second gate are coupled to a same electric line among the electric lines,

wherein a first channel material of the first transistor is an oxide, and

wherein a second channel material of the second transistor is a non-oxide.

15. The display device of claim 14 , wherein the photodiode comprises a cathode, and wherein the oxide TFT is arranged between the cathode and the poly-Si TFT.

16. The display device of claim 14 , wherein the oxide TFT comprises a tied dual-gated structure comprising top gates and bottom gates, and wherein the top gates and the bottom gates are coupled to a same electric line among the electric lines.

17. A display device comprising:

a sensor comprising:

a plurality of electric lines comprising row lines, column lines, and reset lines;

a photodiode corresponding to a pixel of a pixel array;

a readout transistor portion between the photodiode and a first column line among the column lines, wherein the readout transistor portion comprises a gate coupled to a first row line among the row lines;

a first transistor comprising a first gate, a first source, and a first drain, wherein the first drain is coupled to the photodiode; and

a second transistor comprising a second gate, a second source, and a second drain,

wherein the second drain is coupled in series with the first source,

wherein the first gate and the second gate are coupled to a first reset line of the reset lines, and

wherein a first channel material of the first transistor is different from a second channel material of the second transistor.

18. The display device of claim 17 , wherein the first channel material is an oxide and the second channel material is a non-oxide.

19. A display device, comprising:

a light emitting portion comprising a light emitting diode, a switching transistor comprising a first gate, and a first reset transistor; and

a photodiode portion comprising a readout transistor and a second reset transistor comprising a second gate,

wherein the second reset transistor is configured to reset data during a light emitting period of the light emitting diode, and wherein the first reset transistor is configured to reset data during a readout period of the readout transistor,

wherein the first gate and the second gate are configured to be coupled to a first scan line, and

wherein the first gate and the readout transistor are configured to be coupled to a second scan line.

20. The display device of claim 19 , wherein the switching transistor and the readout transistor are configured to be coupled to a same data voltage line, and wherein the first reset transistor and the second reset transistor are coupled to a same reference voltage line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2021
From: TAKATORI, KENICHI
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 056298/0172 →
Continuity (2)
Continuation PCTCN2018112254 · Oct 27, 2018
Related Publication 20210264829A1 · Aug 26, 2021
Cited By (1)
US 12,705,918