Superconducting bump bonds for quantum computing systems
A quantum computing system can include a first substrate including one or more quantum control devices. The quantum computing system can include a second substrate including one or more quantum circuit elements. The quantum computing system can include one or more tin contact bonds formed on the first substrate and the second substrate. The tin contact bonds can bond the first substrate to the second substrate. The tin contact bonds can be or can include tin, such as a tin alloy.
1. A quantum computing system comprising:
a first substrate comprising one or more quantum control devices;
a second substrate comprising one or more quantum circuit elements; and
one or more tin contact bonds formed on the first substrate and the second substrate,
wherein the one or more tin contact bonds are coated with a capping layer.
2. The quantum computing system of claim 1 , wherein the one or more tin contact bonds comprise a superconducting tin alloy, the superconducting tin alloy comprising at least one of lead, bismuth, antimony, gold, niobium, copper, cadmium, silver, indium, or gallium, the superconducting tin alloy superconducting at temperatures less than about 1 kelvin.
3. The quantum computing system of claim 1 , further comprising a third substrate and one or more second contact bonds formed on the first substrate and the third substrate.
4. The quantum computing system of claim 1 , wherein the one or more tin bump bonds comprise one or more superconducting bump bonds between the one or more quantum control devices and the one or more quantum circuit elements.
5. The quantum computing system of claim 1 , wherein the one or more tin contact bonds comprise one or more hermetic seals.
6. The quantum computing system of claim 1 , wherein at least one of the first substrate or the second substrate comprises a silicon wafer.
7. The quantum computing system of claim 1 , wherein the one or more tin contact bonds are coupled to a ground plane.