IP Library Granted Patent US 11,600,631
Granted Patent B2
US 11,600,631 · App. 16/937,166 · Granted Mar 7, 2023

Devices including staircase structures, and related memory devices and electronic systems

Inventor: Toru Tanzawa (Tokyo, JP)
Assignee: Micron Technology, Inc.
H01L27/11575H01L27/11582
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Quick Facts
Patent No.
US 11,600,631
App. No.
16/937,166
Granted
Mar 7, 2023
Kind
B2
Abstract

A semiconductor device structure comprises stacked tiers each comprising a conductive structure and an insulating structure longitudinally adjacent the at least one conductive structure, at least one staircase structure having steps comprising lateral ends of the stacked tiers, and an opening laterally adjacent a first side of the at least one staircase structure and extending through the stacked tiers and continuously across an entire length of the at least one staircase structure. Conductive structures of the stacked tiers laterally extend from the steps of the at least one staircase structure completely across a second side of the at least one staircase structure opposing the first side to form continuous conductive paths laterally extending completely across the stacked tiers. Additional semiconductor device structures, methods of forming semiconductor device structures, and electronic systems are also described.

Claims (63)

1. A device, comprising:

a stack structure comprising a vertically alternating sequence of electrically conductive structures and electrically insulating structures arranged in tiers, the stack structure comprising:

opposing end sections; and

an interior section horizontally interposed between the opposing end sections in a first direction and having a smaller horizontal width, in a second direction orthogonal to the first direction, than each of the opposing end sections, the interior section comprising:

a middle region comprising portions of the tiers continuously extending from and between the opposing end sections in the first direction; and

a stadium structure neighboring the middle region in the second direction and extending from and between the opposing end sections in the first direction, the stadium structure comprising:

a first staircase structure having positive slope and comprising first steps comprising first horizontal ends of the tiers; and

a second staircase structure opposing the first staircase structure in the first direction and having negative slope, the second staircase structure comprising second steps comprising second horizontal ends of the tiers;

a recess horizontally extending, in the second direction, into the stack structure from sides of the opposing end sections to a side of the stadium structure, the recess vertically extending completely through the stack structure and continuously extending from and between the opposing end sections in the first direction; and

additional electrically conductive structures extending from the stadium structure, through the recess, and to at least one string driver device vertically underlying the stack structure.

2. The device of claim 1 , the interior section of the stack structure further comprises an additional stadium structure horizontally interposed between the stadium structure and the middle region in the second direction, the additional stadium structure comprising:

a first additional staircase structure having positive slope and comprising first additional steps comprising first additional horizontal ends of the tiers; and

a second additional staircase structure opposing the first additional staircase structure in the first direction and having negative slope, the second additional staircase structure comprising second additional steps comprising second additional horizontal ends of the tiers.

3. The device of claim 2 , wherein:

the first additional steps of the first additional staircase structure are located at different vertical positions within the stack structure than the first steps of the first staircase structure; and

the second additional steps of the second additional staircase structure are located at different vertical positions within the stack structure than the second steps of the second staircase structure.

4. The device of claim 1 , wherein the electrically conductive structures of the stack structure comprise tungsten.

5. The device of claim 1 , wherein the at least one string driver device comprises:

a first string driver device horizontally adjacent the first staircase structure of the stadium structure in the first direction; and

a second string driver device horizontally adjacent the second staircase structure of the stadium structure in the first direction.

6. The device of claim 5 , wherein the additional electrically conductive structures comprise:

first electrically conductive routing structures extending between and electrically coupling the first string driver device and some of the first steps of the first staircase structure; and

second electrically conductive routing structures extending between and electrically coupling the second string driver device and some of the second steps of the second staircase structure.

7. The device of claim 1 , wherein the additional electrically conductive structures extend from only one of the first staircase structure of the stadium structure and the second staircase structure of the stadium structure.

8. A memory device, comprising:

a memory array block having an array of memory cells and including tiers each individually comprising a word line structure an insulating structure vertically adjacent the word line structure, the memory array block comprising:

opposing end sections;

an interior section interposed between the opposing end sections in a first horizontal direction and having a smaller horizontal width, in a second horizontal direction orthogonal to the first horizontal direction, than each of the opposing end sections, the interior section comprising:

a middle region comprising portions of the tiers continuously extending from and between the opposing end sections in the first horizontal direction; and

at least one staircase structure neighboring the middle region in the second horizontal direction and interposed between the opposing end sections in the first horizontal direction, the at least one staircase structure having steps comprising horizontal ends of at least some of the tiers;

conductive contact structures on at least some of the steps of the at least one staircase structure;

a recess vertically extending completely through the tiers of the memory array block and extending in the second horizontal direction from sides of the opposing end sections to a side of the at least one staircase structure, the at least one staircase structure continuously extending in the first horizontal direction from and between the opposing end sections of the memory array block;

at least one string driver device vertically underlying the memory array block; and

conductive routing structures extending from the at least one string driver device, through the recess, and to the conductive contact structures.

9. The memory device of claim 8 , wherein the at least one staircase structure comprises a stadium structure comprising:

a first staircase structure; and

a second staircase structure in series with the first staircase structure in the first horizontal direction.

10. The memory device of claim 8 , wherein each of the steps of the at least one staircase structure has one of the conductive contact structures thereon.

11. The memory device of claim 8 , wherein at least one of the steps of the at least one staircase structure is free of one of the conductive contact structures thereon.

12. The memory device of claim 8 , wherein the at least one string driver device comprises at least two string driver devices neighboring opposite horizontally boundaries of the at least one staircase structure than one another.

13. The memory device of claim 12 , wherein:

the word line structure of at least one of the tiers of the memory array block is electrically coupled to a first of the at least two string driver devices; and

the word line structure of at least one other of the tiers of the memory array block is electrically coupled to a second of the at least two string driver devices.

14. The memory device of claim 8 , wherein each of the conductive routing structures individually comprises:

a first portion horizontally extending, in the second horizontal direction, from one of the conductive contact structures to a location within horizontal boundaries of the recess;

a second portion vertically extending from the first portion toward the at least one string driver device; and

a third portion horizontally extending, in at least the first horizontal direction, from the second portion to the at least one string driver device.

15. The memory device of claim 8 , further comprising at least one additional staircase structure extending in parallel with the at least one staircase structure in the first horizontal direction.

16. An electronic system, comprising:

an input device;

an output device;

a processor device operably connected to the input device and the output device; and

a memory device operably connected to the processor device and comprising:

a stack structure including tiers each comprising a conductive structure and an insulating structure vertically adjacent the conductive structure, the stack structure comprising:

opposing end sections;

an interior section horizontally interposed between the opposing end sections in a first direction and having a smaller horizontal width, in a second direction orthogonal to the first direction, than each of the opposing end sections, the interior section comprising:

a middle region comprising portions of the tiers continuously horizontally extending from and between the opposing end sections in the first direction; and

a staircase structure horizontally adjacent the middle region in the second direction and comprising steps comprising horizontal ends of the tiers, the staircase structure horizontally interposed between the opposing end sections in the first direction;

string drivers vertically underlying the stack structure;

a recess horizontally extending, in the second direction, into the stack structure from sides of the opposing end sections to a side of the staircase structure, the recess continuously extending in the first direction from and between the opposing end sections and vertically extending completely through the stack structure;

conductive contact structures vertically extending from at least some of the steps of the staircase structure; and

conductive routing structures extending from the conductive contact structures, through the recess, and to one or more of the string drivers.

17. The electronic system of claim 16 , wherein the memory device comprises a 3D NAND Flash memory device.

Continuity (3)
Continuation 15875407 · Jan 19, 2018
Division 15095401 · Apr 11, 2016
Related Publication 20200357813A1 · Nov 12, 2020