IP Library Granted Patent US 11,610,891
Granted Patent B2
US 11,610,891 · App. 17/725,806 · Granted Mar 21, 2023

Semiconductor device including storage node electrode including step and method of manufacturing the semiconductor device

Inventors: Jaehwan Cho (Suwon-si, KR); Junghwan Oh (Yongin-si, KR); Sangho Lee (Hwaseong-si, KR); Junwon Lee (Asan-si, KR); Jinwoo Bae (Yongin-si, KR); Sunghee Han (Hwaseong-si, KR); Yoosang Hwang (Yongin-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L27/10817H01L27/10852
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Quick Facts
Patent No.
US 11,610,891
App. No.
17/725,806
Granted
Mar 21, 2023
Kind
B2
Abstract

A semiconductor device may include a bottom sub-electrode on a substrate, a top sub-electrode on the bottom sub-electrode, a dielectric layer covering the bottom and top sub-electrodes, and a plate electrode on the dielectric layer. The top sub-electrode may include a step extending from a side surface thereof, which is adjacent to the bottom sub-electrode, to an inner portion of the top sub-electrode. The top sub-electrode may include a lower portion at a level that is lower than the step and an upper portion at a level which is higher than the step. A maximum width of the lower portion may be narrower than a minimum width of the upper portion. The maximum width of the lower portion may be narrower than a width of a top end of the bottom sub-electrode. The bottom sub-electrode may include a recess in a region adjacent to the top sub-electrode.

Claims (76)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a bottom mold structure on a substrate;

forming a bottom sub-electrode on the substrate;

forming a lower supporter pattern covering a portion of a side surface of the bottom sub-electrode;

forming an etch stop layer covering a top surface of the lower supporter pattern and a top surface of the bottom sub-electrode, the etch stop layer including a filler part extending up to a level that is lower than a bottom end of the lower supporter pattern;

forming a preliminary top mold layer on the etch stop layer;

planarizing the etch stop layer and the preliminary top mold layer;

forming a top mold structure on the etch stop layer;

forming a top storage node electrode hole passing through the etch stop layer and the top mold structure, the top storage node electrode hole exposing the top surface of the bottom sub-electrode;

forming a top sub-electrode filling the top storage node electrode hole, the top sub-electrode including a step extending in a direction toward an inner portion thereof; and

removing the etch stop layer.

2. The method of claim 1 , wherein a cross-section of the filler part has a U-shape or a V-shape.

3. The method of claim 1 , wherein the forming the bottom mold structure includes:

forming a first bottom mold layer and lower supporter layer.

4. The method of claim 3 , wherein the forming the lower supporter pattern includes:

forming a preliminary lower supporter pattern by forming a bottom storage node electrode hole penetrating the lower supporter layer; and

forming a preliminary lower supporter pattern including an overhang by forming a lower capping layer covering the preliminary lower supporter pattern.

5. The method of claim 4 , wherein the forming the bottom sub-electrode includes:

forming an electrode material layer filling the bottom storage node electrode hole.

6. The method of claim 5 , wherein the forming the lower supporter pattern includes:

forming an opening by removing a portion of the preliminary lower supporter pattern including the overhang, and forming a cavity by removing the first bottom mold layer.

7. The method of claim 6 , wherein the forming the etch stop layer includes:

forming a second bottom mold layer filling the cavity and the opening;

re-opening the opening by partially removing the second bottom mold layer; and

forming the etch stop layer in the opening.

8. The method of claim 7 , wherein the re-opening the opening includes:

forming an inclined surface on the upper portion of the bottom sub-electrode by partially etching the bottom sub-electrode.

9. The method of claim 8 , wherein the top sub-electrode further includes:

a downward protrusion portion in contact with the inclined surface.

10. The method of claim 8 , wherein the etch stop layer covers the inclined surface.

11. The method of claim 1 , the forming the top storage node electrode hole further includes:

etching the top mold structure to form a stepped portion, and

the stepped portion is offset with respect to an inner wall of the top storage node electrode hole.

12. The method of claim 1 , the method further includes:

forming an upper supporter pattern covering a portion of a side surface of the top sub-electrode.

13. The method of claim 12 , the forming the upper supporter pattern includes:

forming a preliminary upper supporter pattern by forming the top storage node electrode hole;

forming a preliminary upper supporter pattern including an overhang by forming an upper capping layer covering the preliminary upper supporter pattern; and

removing a portion of the preliminary upper supporter pattern including the overhang.

14. The method of claim 13 , the removing the etch stop layer includes:

forming a cavity by removing a portion of the top mold structure through an opening of the upper supporter pattern, and exposing the etch stop layer.

15. A method of manufacturing a semiconductor device, the method comprising:

forming a bottom mold structure on a substrate;

forming a bottom storage node electrode hole penetrating the bottom mold structure and forming a preliminary lower supporter pattern;

forming a bottom sub-electrode in the bottom storage node electrode hole;

forming a lower supporter pattern having an opening by partially removing the preliminary lower supporter pattern;

forming a bottom mold layer filling the opening;

re-opening the opening by partially removing the bottom mold layer;

forming an etch stop layer including a filler part partially filling the opening;

forming a top mold structure on the etch stop layer;

forming a top storage node electrode hole through the etch stop layer and the top mold structure to expose a top surface of the bottom sub-electrode;

forming a top sub-electrode filling the top storage node electrode hole; and

removing the etch stop layer;

wherein the top sub-electrode including a step extending in a direction toward an inner portion thereof, and

wherein the filler part has a U-shape or V-shape in cross section.

16. The method of claim 15 , wherein the preliminary lower supporter pattern includes an overhang.

17. The method of claim 15 , the method further includes:

before forming the lower supporter pattern, planarizing a top surface of the preliminary lower supporter pattern and a top surface of the bottom sub-electrode.

18. The method of claim 15 , the method further includes:

forming a preliminary top mold layer completely filling the opening on the etch stop layer before forming the top mold structure; and

exposing a top surface of the etch stop layer by partially removing the preliminary top mold layer through a planarization process.

19. The method of claim 15 , the removing the etch stop layer includes:

forming an upper supporter pattern including an opening; and

exposing the etch stop layer by removing a portion of the top mold structure through the opening.

20. A method of manufacturing a semiconductor device, the method comprising:

forming a preliminary lower supporter pattern on a substrate;

forming a bottom sub-electrode on the substrate;

forming a lower supporter pattern including an opening by partially etching the preliminary lower supporter pattern;

forming an etch stop layer covering a top surface of the bottom sub-electrode and a top surface of the lower supporter pattern and filling a portion of the opening;

forming a preliminary top mold layer filling the opening;

forming a top mold structure on the etch stop layer and the preliminary top mold layer;

forming a top sub-electrode penetrating the top mold structure; and

removing the etch stop layer;

forming a dielectric layer covering the lower supporter pattern, the bottom sub-electrode, and the top sub-electrode; and

forming a plate electrode in contact with the dielectric layer;

wherein the etch stop layer has a U-shape or V-shape in cross section.

Priority Claims (1)
KR 10-2019-0179040 · Dec 31, 2019 · national
Continuity (2)
Division 16943019 · Jul 30, 2020
Related Publication 20220246621A1 · Aug 4, 2022