Method for processing a FinFET device
A method for processing a forksheet device includes providing a substrate and forming a trench in the substrate, extending along a first direction, in the substrate. The formation of the trench includes forming a grating structure on the substrate that includes a pair of maskings, arranged at a distance from each other, and etching the trench into the substrate in a region between the pair of maskings. The method also includes filling the trench with a filling material and partially recessing the substrate to form a fin structure. This fin structure includes the filled trench, a first section of the substrate at a first side of the filled trench and a second section of the substrate at a second side of the filled trench, and forming a gate structure on and around the fin structure. The method additionally includes forming a gate structure on and around the fin structure.
1. A method for processing a forksheet device, the method comprising:
providing a substrate, wherein the substrate comprises a nanosheet structure of alternating nanolayers of two different semiconductor materials that comprise Si and SiGe;
forming a trench in the substrate, wherein the trench extends along a first direction, and wherein the trench passes through the nanosheet structure, wherein forming the trench in the substrate comprises:
forming a grating structure on the substrate, wherein the grating structure comprises a pair of maskings extending along the first direction, wherein the pair of maskings are arranged at a distance from each other; and
etching into the substrate in a region between the pair of maskings to form the trench;
filling the trench with a filling material;
partially recessing the substrate to form a fin structure, wherein the fin structure comprises the filled trench, a first section of the substrate at a first side of the filled trench and a second section of the substrate at a second side of the filled trench, wherein the first and the second section of the substrate form opposite sides of the fin structure and each comprise a part of the nanosheet structure, and wherein the filled trench forms a dielectric isolation barrier of the fin structure; and
forming a gate structure on and around the fin structure.
2. The method according to claim 1 , wherein the method further comprises:
forming a p-doped region on or in the first section of the substrate or forming an n-doped region on or in the second section of the substrate following the formation of the fin structure.
3. The method according to claim 2 , wherein the p-doped or the n-doped regions are formed via an epitaxy growth process during an epitaxial formation of source and drain terminals.
4. The method according to claim 1 , wherein a spacer layer is formed at least partially around the pair of maskings on facing sidewalls of each of the pair of maskings.
5. The method according to claim 1 , wherein forming the trench in the substrate further comprises:
forming, following the forming of the grating structure, a sacrificial structure on the substrate and on and around the grating structure, wherein the sacrificial structure comprises at least one material layer; and
selectively removing the sacrificial structure in a region between the pair of maskings.
6. The method according to claim 5 , wherein a spacer layer is formed at least partially around the pair of maskings on facing sidewalls of each of the pair of maskings.
7. The method according to claim 6 , wherein the spacer layer is formed prior to the forming of the sacrificial structure or following the selective removal of the sacrificial structure in the region between the pair of maskings.
8. The method according to claim 7 , wherein the distance from each side of the filled trench is defined by a respective inner sidewall of a respective masking of the pair of maskings on the respective side of the trench.
9. The method according to claim 8 , wherein the fin structure is formed by etching the substrate at a distance from each side of the filled trench.
10. The method according to claim 1 , wherein the fin structure is formed by etching the substrate at a distance from each side of the filled trench.
11. The method according to claim 10 , wherein the distance from each side of the filled trench is defined by a respective inner sidewall of a respective masking of the pair of maskings on the respective side of the trench.
12. The method according to claim 1 , wherein a difference between a depth of the trench and a height of the fin structure is less than 10%.
13. A forksheet device formed using a method that comprises the method according to claim 12 .
14. The method according to claim 1 , wherein a difference between a depth of the trench and a height of the fin structure is less than 5%.
15. The method according to claim 1 , wherein a depth of the trench corresponds to a height of the fin structure.
16. A forksheet device formed using a method that comprises the method according to claim 15 .
17. The method according to claim 1 , wherein a depth of the trench is larger than or equal to a height of the fin structure.
18. The method according to claim 1 , wherein the filling material comprises a dielectric material selected from one or more of: SiN, SiC, SiOCN, SiCN, SiO 2 , SiCO, or SiON.
19. The method according to claim 1 , wherein the trench is filled via a plasma-enhanced atomic layer deposition, PEALD, process.