IP Library › Granted Patent US 11,620,083
Granted Patent B2
US 11,620,083 · App. 17/463,908 · Granted Apr 4, 2023

Method for implementing predictable latency mode feature in SSD, and non-volatile memory (NVM) based storage device

Inventors: Srinivasa Raju Nadakuditi (Bangalore, IN); Abhinav Kumar Singh (Bangalore, IN); Chandrashekar Tandavapura Jagadish (Bangalore, IN); Manu Yelakkuru Prabhuswamy (Bangalore, IN)
Assignee: Samsung Electronics Co., Ltd.
G06F3/0659G06F3/064G06F3/0613G06F3/0631G06F3/0665G06F3/0679
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Quick Facts
Patent No.
US 11,620,083
App. No.
17/463,908
Granted
Apr 4, 2023
Kind
B2
Abstract

A method includes: receiving, by a storage device from a core in a host, a request to provide exclusive resource to a command of a predefined submission queue of a non-volatile memory (NVM) set in the storage device, wherein the request pertains to operating the NVM set in a deterministic state; generating a virtual NVM set identifier for a virtual NVM set based on a predefined mapping of the predefined submission queue and the NVM set; determining a storage controller associated with the NVM set based on a predefined mapping of the predefined submission queue, the NVM set, and the virtual NVM set identifier; enabling at least one core to operate in a Predictable Latency Mode; and operating the storage controller and the NVM set in the deterministic state by allocating predetermined resources to execute the command and return data with a predictable latency.

Claims (27)

1. A method, comprising:

receiving, by a storage device from a core in a host supporting one or more cores, a request to provide exclusive resource to a command belonging to one or more predefined submission queues of a non-volatile memory (NVM) set in the storage device, wherein the request pertains to operating the NVM set in a deterministic state to return data with a predictable latency;

generating a virtual NVM set identifier for a virtual NVM set based on a predefined mapping of the one or more predefined submission queues and the NVM set;

determining a storage controller associated with the NVM set based on a predefined mapping of the one or more predefined submission queues, the NVM set, and the virtual NVM set identifier;

enabling at least one core of the host to operate in a Predictable Latency Mode; and

operating the storage controller and the NVM set in the deterministic state by allocating predetermined resources to execute the command and return data with a predictable latency.

2. The method as claimed in claim 1 , wherein the NVM set includes:

a plurality of namespaces defining a collection of logical block address; and

optionally, an unallocated storage area defining a space outside the plurality of namespaces and inaccessible to the host.

3. The method as claimed in claim 2 , wherein each of the plurality of namespaces is uniquely mapped with a virtual NVM set identifier.

4. The method as claimed in claim 2 , wherein operating the storage controller and the NVM set in the deterministic state includes:

determining a namespace mapped with the virtual NVM set identifier and the storage controller;

allocating resources of the storage device to the determined namespace; and

fetching a plurality of commands from the one or more predefined submission queues based on the allocated resources.

5. The method as claimed in claim 4 , further comprising:

fetching one or more commands from each of the one or more predefined submission queues based on a predefined sequence for a selected submission queue, a priority level associated with the selected submission queue, and an arbitration burst setting; and

processing the one or more commands based on a defined execution order in the storage controller.

6. The method as claimed in claim 1 , further comprising:

operating another storage controller associated with the NVM set in a non-deterministic state; and

operating another NVM set in the storage device in a non-deterministic state.

7. The method as claimed in claim 6 , further comprising:

fetching one or more commands from each submission queue in one or more remaining submissions queues from a plurality of submission queues based on a predefined sequence for each submission queue, a priority level associated with each submission queue, and an arbitration burst setting, the plurality of submission queues including the one or more predefined submission queues mapped to the NVM set;

determining whether execution of the one or more commands is blocked due to the operation of the other NVM set in the non-deterministic state;

estimating a time period that indicates whether the other NVM set operates in the non-deterministic state; and

controlling execution of the one or more commands until expiry of the time period.

8. The method as claimed in claim 1 , wherein the operating of the NVM set in the deterministic state includes executing one or more commands belonging to the virtual NVM set based on allocating more resources of the determined storage controller.

9. The method as claimed in claim 1 , further comprising executing one or more commands of another virtual NVM set that is not operating in the deterministic state based on allocating less resources of the determined storage controller.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE SPELLING OF THE FIRST INVENTOR'S NAME TO READ SRINIVASA RAJU NADAKUDITI PREVIOUSLY RECORDED ON REEL 057393 FRAME 0099. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 23, 2021
From: NADAKUDITI, SRINIVASA RAJU; SINGH, ABHINAV KUMAR; TANDAVAPURA JAGADISH, CHANDRASHEKAR; YELAKKURU PRABHUSWAMY, MANU
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 057813/0114 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2021
From: NADAKUDITI, SRINIVSA RAJU; SINGH, ABHINAV KUMAR; TANDAVAPURA JAGADISH, CHANDRASHEKAR; YELAKKURU PRABHUSWAMY, MANU
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 057393/0099 →
Priority Claims (1)
IN 202141029863 · Jul 2, 2021 · national
Continuity (1)
Related Publication 20230004323A1 · Jan 5, 2023