IP Library › Granted Patent US 11,625,637
Granted Patent B2
US 11,625,637 · App. 16/753,699 · Granted Apr 11, 2023

Methods and apparatus for performing phase operations

Inventor: Craig Gidney (Goleta, CA)
Assignee: Google LLC
G06N10/00H03K19/20
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Quick Facts
Patent No.
US 11,625,637
App. No.
16/753,699
Granted
Apr 11, 2023
Kind
B2
Abstract

Methods, systems, and apparatus for performing phase operations. In one aspect, a method for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state includes: performing a first NOT operation on the third qubit; computing a controlled adder operation on the first, second and third qubit, comprising encoding the result of the controlled adder operation in a fourth qubit; performing a square of the phase operation on the fourth qubit; uncomputing the controlled adder operation on the first, second and third qubit; performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control; performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and performing a second NOT operation on the third qubit.

Claims (84)

1. A method for performing a same phase operation on a first and second qubit included in quantum computing hardware using a third qubit included in the quantum computing hardware, wherein the third qubit is prepared in a phased plus state, the method comprising:

performing, by the quantum computing hardware, a first NOT operation on the third qubit;

computing, by the quantum computing hardware, a controlled adder operation on the first, second and third qubit, comprising encoding a result of the controlled adder operation in a fourth qubit included in the quantum computing hardware;

performing, by the quantum computing hardware, a square of the phase operation on the fourth qubit;

uncomputing, by the quantum computing hardware, the controlled adder operation on the first, second and third qubit;

performing, by the quantum computing hardware, a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control;

performing, by the quantum computing hardware, a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and

performing, by the quantum computing hardware, a second NOT operation on the third qubit.

2. The method of claim 1 , wherein computing the controlled adder operation comprises:

performing a multi target CNOT on the first, second and third qubit, wherein the first qubit acts as the control;

computing a logical AND operation between the second and third qubit;

encoding a result of the logical AND computation in the fourth qubit; and

performing a CNOT operation between the first qubit and the fourth qubit, wherein the first qubit acts as the control.

3. The method of claim 1 , wherein uncomputing the controlled adder operation comprises:

performing a CNOT operation on the first qubit and the fourth qubit, wherein the first qubit acts as the control;

un-computing a logical AND operation between the second and third qubit; and

performing a multi target CNOT operation on the first, second and third qubit, wherein the first qubit acts as the control.

4. The method of claim 1 , wherein:

uncomputing the controlled adder operation on the first, second and third qubit;

performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control;

performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control, comprises:

performing a CNOT operation on the first qubit and the fourth qubit, wherein the first qubit acts as the control;

un-computing a logical AND operation between the second and third qubit; and

performing a CNOT operation on the second qubit and the third qubit, wherein the second qubit acts as the control; and

performing a multi target CNOT operation on the first, second and third qubit, wherein the first qubit acts as the control.

5. The method of claim 1 , wherein performing the second NOT operation on the third qubit returns the third qubit to the phased plus state.

6. The method of claim 1 , wherein the first and second qubits are initially prepared in arbitrary initial states.

7. The method of claim 1 , wherein:

the first qubit is prepared in an arbitrary initial state, the second qubit is prepared in a plus state, and the third qubit is prepared in a phased plus state; and

after performing the second NOT operation on the third qubit, the second qubit is in a phased plus state, the third qubit is in a phased plus state, and the phase operation has been performed on the first qubit.

8. The method of claim 7 , further comprising providing the second qubit in the phased plus state for use in a gate teleportation operation.

9. The method of claim 8 , wherein the gate teleportation operation comprises one of:

performing a second same phase operation on a fifth and sixth qubit included in the quantum computing hardware;

preparing a sixth qubit included in the quantum computing hardware in a same state as a seventh qubit included in the quantum computing hardware when performing a phase operation on a fifth qubit included in the quantum computing hardware; or

performing the phase operation on a fifth qubit included in the quantum computing hardware.

10. The method of claim 9 , wherein performing the phase operation on a fifth qubit comprises:

applying a CNOT operation between the second qubit prepared in the phased plus state and the fifth qubit prepared in an arbitrary state, wherein the fifth qubit acts as the control;

measuring the second qubit; and

applying a squared phase operation to the fifth qubit if a generated measurement result from measuring the second qubit indicates that the second qubit is ON.

11. The method of claim 7 , wherein performing a square of the phase operation on the fourth qubit comprises preparing a sixth qubit included in the quantum computing hardware in a same state as a seventh qubit included in the quantum computing hardware when performing the square of the phase operation on a fifth qubit included in the quantum computing hardware.

12. The method of claim 11 , further comprising iteratively performing squares of the phase operation.

13. The method of claim 1 , further comprising determining a Hamming weight of produced states.

14. The method of claim 1 , wherein the same phase operation comprises a single qubit operation of the form

Z

θ

=

(

1

0

0

e

i

⁢

⁢

πθ

)

where θ specifies the phase operation, and wherein the square of the phase operation is given by Z 2θ .

15. The method of claim 1 , wherein a phased plus state comprises the desired phase operation applied to a plus state |+ =(|0 +|1 )/√{square root over (2)}.

16. The method of claim 1 , wherein the phase operation comprises a √{square root over (T)}=Z π/8 operation.

17. The method of claim 1 , further comprising, for a system requiring N phase operations to be performed on multiple respective qubits included in the quantum computing hardware:

grouping qubits that require a same phase operation into O(sqrt(N)) groups of size O(sqrt(N));

preparing a full-total qubit register of size O(log(N));

for each group:

computing a Hamming weight of the qubits in the group;

adding a computed group-total into the full-total qubit register;

uncompute the Hamming weight of the qubits in the group;

performing phase operations on the full-total qubit register;

for each group:

computing a Hamming weight of the qubits in the group;

subtracting a computed group-total out of the full-total qubit register; and

uncomputing the Hamming weight of the qubits in the group.

18. The method of claim 17 , further comprising clearing and discarding the full-total qubit register.

19. An apparatus comprising quantum computing hardware in data communication with one or more classical processors, wherein the apparatus is configured to perform operations for performing a same phase operation on a first and second qubit using a third qubit prepared in a phased plus state, the operations comprising:

performing a first NOT operation on the third qubit;

computing a controlled adder operation on the first, second and third qubit, comprising encoding a result of the controlled adder operation in a fourth qubit;

performing a square of the phase operation on the fourth qubit;

uncomputing the controlled adder operation on the first, second and third qubit;

performing a CNOT operation between the first qubit and the third qubit, wherein the first qubit acts as the control;

performing a CNOT operation between the second qubit and the third qubit, wherein the second qubit acts as the control; and

performing a second NOT operation on the third qubit.

20. The apparatus of claim 19 , wherein the quantum computing hardware comprises:

a register of qubits;

a plurality of control lines coupled to the register of qubits;

a plurality of control circuits coupled to the plurality of control lines.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2020
From: GIDNEY, CRAIG
To: GOOGLE LLC
Reel/Frame 052597/0321 →
Continuity (2)
Provisional Application 62658993 · Apr 17, 2018
Related Publication 20210027187A1 · Jan 28, 2021
Cited By (4)
US 12,505,370 US 12,561,594 US 12,579,459 US 12,731,061