IP Library Granted Patent US 11,637,016
Granted Patent B2
US 11,637,016 · App. 16/150,409 · Granted Apr 25, 2023

Systems and methods for bidirectional device fabrication

Inventors: Richard A. Blanchard (Los Altos, CA); William C. Alexander (Spicewood, TX)
Assignee: IDEAL POWER INC.
H01L21/2251H01L21/324H01L21/6835H01L21/768
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Quick Facts
Patent No.
US 11,637,016
App. No.
16/150,409
Granted
Apr 25, 2023
Kind
B2
Abstract

Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer. Dopants can be introduced on both sides shortly before a single long high-temperature diffusion step diffuses all dopants to approximately equal depths on both sides. All high-temperature processing occurs with no handle wafer or with a high-temperature handle wafer attached. Once a medium-temperature handle wafer is attached, no high-temperature processing steps occur. High temperatures can be considered to be those which can result in damage to the device in the presence of aluminum-based metallizations.

Claims (40)

1. A method of fabricating a two-sided semiconductor device which has patterned current-carrying contact areas on both faces of a semiconductor wafer, comprising, in any order except as specified:

a) introducing dopants in two respective patterns into a first face of the wafer; and then

b) attaching a first handle wafer to the first face of the wafer;

c) introducing dopants in two respective patterns into a second face of the wafer;

d) heating the wafer, to thereby diffuse and activate the dopants in both said first and second faces of the wafer;

e) forming patterned metallization on the second face of the wafer, and then attaching a second handle wafer over the patterned metallization;

f) removing the first handle wafer, and then forming additional patterned metallization on the first face of the wafer; and then

g) removing the second handle wafer, and completing fabrication of a two-sided semiconductor device.

2. The method of claim 1 , wherein both p-type and n-type dopants are introduced, in respective patterns and not overall, on both said first and second surfaces of the wafer.

3. The method of claim 1 , wherein the semiconductor wafer is a silicon wafer.

4. The method of claim 1 , wherein, when each said patterned metallization is formed, additional dielectric and contact elements are also formed.

5. The method of claim 1 , wherein the patterned metallization includes aluminum.

6. The method of claim 1 , wherein the second handle wafer has a different composition than the first handle wafer.

7. The method of claim 1 , wherein the heating step uses a higher sustained temperature than any step thereafter.

8. The method of claim 1 , wherein the heating step uses a higher sustained temperature than any step after metallization is present.

9. The method of claim 1 , wherein the step of introducing dopants uses the same patterns on both the first and second faces.

10. The method of claim 1 , wherein the step of forming additional metallization on the first face uses approximately the same patterns as the step of forming patterned metallization on the second face.

11. The method of claim 1 , further comprising the initial step, prior to said step b), of attaching an initial handle wafer to the wafer.

12. The method of claim 1 , further comprising the initial steps, prior to said step b), of thinning the wafer to less than 20% of its width, and attaching an initial handle wafer to the wafer.

13. The method of claim 1 , further comprising the initial steps, prior to said step b), of thinning the wafer to less than 80 microns, and attaching an initial handle wafer to the wafer.

14. The method of claim 1 , wherein said step c) is performed after said step b).

15. The method of claim 1 , wherein the bond between each said handle wafer and said semiconductor wafer is substantially unaffected by temperatures used after the respective heating step.

16. The method of claim 1 , wherein the first handle wafer is silicon.

17. The method of claim 1 , wherein the first handle wafer is silicon dioxide.

18. A method of fabricating a two-sided semiconductor device which has patterned current-carrying contact areas on both faces of a semiconductor wafer, comprising, in any order except as specified:

a) introducing dopants in a pattern into a first face of the wafer; and then

b) attaching a first handle wafer to the first face of the wafer;

c) introducing dopants in a pattern into a second face of the wafer;

d) heating the wafer, to thereby diffuse and activate the dopants in both said first and second faces of the wafer;

e) forming patterned metallization on the second face of the wafer, and then attaching a second handle wafer, which has a different composition from the first handle wafer, over the patterned metallization;

f) removing the first handle wafer, and then forming additional patterned metallization on the first face of the wafer; and then

g) removing the second handle wafer, and completing fabrication of a two-sided semiconductor device.

19. A method of fabricating a two-sided power semiconductor device which has both patterned current-carrying connections and also control terminal connections on both faces of a semiconductor wafer, comprising, in any order except as specified:

a) introducing both p-type and n-type dopants in a pattern, and not overall, into a first face of the wafer;

b) attaching a first handle wafer to the first face of the wafer;

c) introducing both p-type and n-type dopants in a pattern, and not overall, into a second face of the wafer;

d) heating the wafer, to thereby diffuse and activate the dopants in both said first and second faces of the wafer;

e) forming patterned metallization on the second face of the wafer, and then attaching a second handle wafer over the patterned metallization;

f) removing the first handle wafer, and then forming additional patterned metallization on the first face of the wafer; and then

g) removing the second handle wafer, and completing fabrication of a two-sided semiconductor device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2023
From: BLANCHARD, RICHARD A.; ALEXANDER, WILLIAM C.
To: IDEAL POWER INC.
Reel/Frame 062744/0808 →
Continuity (10)
Continuation 15794418 · Oct 26, 2017
Continuation 15164358 · May 25, 2016
Continuation 14566576 · Dec 10, 2014
Continuation In Part 14313960 · Jun 24, 2014
Provisional Application 61929874 · Jan 21, 2014
Provisional Application 61928644 · Jan 17, 2014
Provisional Application 61924884 · Jan 8, 2014
Provisional Application 61914491 · Dec 11, 2013
Related Publication 20200111672A1 · Apr 9, 2020
Related Publication 20220262639A9 · Aug 18, 2022
Cited By (5)
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