Embedded antennas in integrated circuits, and methods of making and using the same
Embedded antennas in integrated circuits, and methods of making and using the same, are provided herein. An integrated circuit within a semiconductor die may include a control circuit; an antenna configured to wirelessly receive a control signal at a predefined frequency; and an interconnect configured to provide the received control signal from the antenna to the control circuit. The control circuit may be configured to control a function of the integrated circuit responsive to the received control signal.
1. An integrated circuit within a semiconductor die comprising a plurality of metallization layers, the integrated circuit comprising:
a control circuit formed using at least one of the metallization layers within the semiconductor die;
an antenna formed using at least one of the metallization layers of the semiconductor die and configured to wirelessly receive a control signal at a predefined frequency; and
an interconnect formed using at least one of the metallization layers of the semiconductor die and configured to provide the control signal from the antenna to the control circuit, the control circuit configured to control a function of the integrated circuit responsive to the received control signal.
2. The integrated circuit of claim 1 , wherein the antenna comprises a first patterned metal layer.
3. The integrated circuit of claim 2 , wherein the first patterned metal layer is disposed over the control circuit.
4. The integrated circuit of claim 3 , wherein the first patterned metal layer is the top metal layer in the semiconductor die.
5. The integrated circuit of claim 2 , wherein the interconnect comprises a second patterned metal layer disposed over the control circuit and disposed below the first patterned metal layer.
6. The integrated circuit of claim 1 , wherein the integrated circuit comprises a field-programmable gate array (FPGA).
7. The integrated circuit of claim 1 , wherein the integrated circuit comprises an application specific integrated circuit (ASIC).
8. The integrated circuit of claim 1 , wherein the integrated circuit comprises a field-programmable gate array (FPGA), and wherein the antenna and the interconnect are programmed into configurable logic blocks of the FPGA.
9. The integrated circuit of claim 1 , wherein the antenna comprises a monopole.
10. The integrated circuit of claim 1 , wherein the antenna has a length between about 1 μm and about 50 mm.
11. The integrated circuit of claim 1 , wherein the semiconductor die comprises silicon, gallium arsenide, germanium, silicon-germanium, gallium nitride, or a combination thereof.
12. The integrated circuit of claim 1 , wherein the predefined frequency is between about 1 MHz and about 1000 MHz.
13. The integrated circuit of claim 1 , wherein the control signal comprises an encryption key, and wherein the control circuit is configured to apply the encryption key to the function of the integrated circuit.
14. The integrated circuit of claim 1 , wherein the control circuit is configured to enable the function of the integrated circuit responsive to the control signal.
15. The integrated circuit of claim 1 , wherein the control circuit is configured to disable the function of the integrated circuit responsive to the control signal.
16. The integrated circuit of claim 1 , wherein the control circuit is configured to alter an output of the integrated circuit responsive to the control signal.
17. The integrated circuit of claim 1 , further comprising an analog front-end circuit coupled to the antenna and configured to process the received signal for use by the control circuit.
18. The integrated circuit of claim 1 , further comprising an analog-to-digital converter coupled to the antenna and configured to digitize the received signal for use by the control circuit.
19. A method of making an integrated circuit within a semiconductor die, the semiconductor die comprising a plurality of metallization layers, the integrated circuit having a function, the method comprising:
forming a control circuit within the semiconductor die using at least one of the metallization layers within the semiconductor die;
forming an embedded antenna within the semiconductor die using at least one of the metallization layers within the semiconductor die; and
forming an interconnect between the control circuit and the antenna using at least one of the metallization layers within the semiconductor die, wherein the control circuit is configured to control the function of the integrated circuit responsive to a control signal wirelessly received by the embedded antenna.
20. A method of controlling an integrated circuit, the method comprising:
providing an integrated circuit within a semiconductor die, the semiconductor die comprising a plurality of metallization layers, the integrated circuit including an embedded antenna formed using at least one of the metallization layers within the semiconductor die and a control circuit formed using at least one of the metallization layers within the semiconductor die;
wirelessly receiving a control signal by the embedded antenna;
providing the received control signal to the control circuit; and
controlling, by the control circuit, a function of the integrated circuit responsive to the control signal.