Battery charger system having a charge pump power stage

1. A circuit comprising:

a first transistor having a first current terminal, a second current terminal, and a first control terminal;

a second transistor having a third current terminal, a fourth current terminal, and a second control terminal, the third current terminal coupled to the second current terminal;

a third transistor having a fifth current terminal, a sixth current terminal, and a third control terminal, the fifth current terminal coupled to the fourth current terminal;

a fourth transistor having a seventh current terminal, an eighth current terminal, and a fourth control terminal, the fourth control terminal coupled to the second control terminal and the seventh current terminal coupled to the sixth current terminal;

a fifth transistor having a ninth current terminal, a tenth current terminal, and a fifth control terminal, the ninth current terminal coupled to the eighth current terminal and the fifth control terminal coupled to the third control terminal; and

a capacitor having a first capacitor terminal and a second capacitor terminal, the first capacitor terminal coupled to the fourth current terminal and the second capacitor terminal coupled to the eighth current terminal.

2. The circuit of claim 1 , wherein the capacitor is a first capacitor, the circuit further comprising a second capacitor having a third capacitor terminal and a fourth capacitor terminal, the third capacitor terminal coupled to the sixth current terminal and the fourth capacitor terminal coupled to the tenth current terminal.

3. The circuit of claim 2 , further comprising a battery coupled in parallel with the second capacitor.

4. The circuit of claim 1 , wherein the capacitor is a fifth capacitor, the circuit further comprising a second capacitor having a third capacitor terminal and a fourth capacitor terminal, the third capacitor terminal coupled to the third current terminal and the fourth capacitor terminal coupled to a ground terminal.

5. The circuit of claim 1 , wherein the second control terminal and the fourth control terminal are configured to receive a first pulse width modulation (PWM) signal, and the third control terminal and the fourth control terminal are configured to receive a second PWM signal, in which the second PWM signal has a phase shifted 180 degrees from a phase of the first PWM signal.

6. The circuit of claim 1 , wherein the tenth current terminal is coupled to a ground terminal and the first current terminal is configured to receive power from an adapter.

7. The circuit of claim 1 , wherein the capacitor is a first capacitor, the circuit further comprising:

a sixth transistor having an eleventh current terminal, a twelfth current terminal, and a sixth control terminal, the eleventh current terminal coupled to the second current terminal and the sixth control terminal coupled to the third control terminal;

a seventh transistor having a thirteenth current terminal, a fourteenth current terminal, and a seventh control terminal, the thirteenth current terminal coupled to the twelfth current terminal and the seventh control terminal coupled to the second control terminal;

an eighth transistor having a fifteenth current terminal, a sixteenth current terminal, and an eighth control terminal, the fifteenth current terminal coupled to the fourteenth current terminal and the eighth control terminal coupled to the third control terminal;

a ninth transistor having a seventeenth current terminal, an eighteenth current terminal, and a ninth control terminal, the seventeenth current terminal coupled to the sixteenth current terminal, the eighteenth current terminal coupled to the tenth current terminal, and the ninth control terminal coupled to the second control terminal; and

a second capacitor having a third capacitor terminal and a fourth capacitor terminal, the third capacitor terminal coupled to the fourteenth current terminal and the fourth capacitor terminal coupled to the sixteenth current terminal.

8. The circuit of claim 1 , wherein:

during a first time period, the second transistor and the fourth transistor are conducing and the third transistor and the fifth transistor are not conducting, to charge the capacitor; and

during a second time period, the second transistor and the fourth transistor are not conducting and the third transistor and the fifth transistor are not conducting, to discharge the capacitor.

9. A method comprising:

receiving, by a battery charger, a voltage or a current from an adapter, wherein the battery charger includes:

a first transistor having a first current terminal, a second current terminal, and a first control terminal;

a second transistor having a third current terminal, a fourth current terminal, and a second control terminal, the third current terminal coupled to the second current terminal;

a third transistor having a fifth current terminal, a sixth current terminal, and a third control terminal, the fifth current terminal coupled to the fourth current terminal;

a fourth transistor having a seventh current terminal, an eighth current terminal, and a fourth control terminal, the fourth control terminal coupled to the second control terminal and the seventh current terminal coupled to the sixth current terminal; and

a fifth transistor having a ninth current terminal, a tenth current terminal, and a fifth control terminal, the ninth current terminal coupled to the eighth current terminal and the fifth control terminal coupled to the third control terminal; and

a capacitor having a first capacitor terminal and a second capacitor terminal, wherein the first capacitor terminal is coupled to the fourth current terminal and the second capacitor terminal is coupled to the eighth current terminal;

charging, by the battery charger, the capacitor during a first time period, while charging a battery, wherein the capacitor is in series with the battery during the first time period; and

during a second time period, discharging, by the battery charger, the capacitor while charging the battery, wherein the capacitor is in parallel with the battery during the second time period, the second time period after the first time period.

10. The method of claim 9 , further comprising:

while the battery has a voltage below a first value, charging the battery using a constant current mode; and

while the battery has a voltage above the first value and below a second value, instructing, by the battery charger, the adapter to increase the voltage or the current.

11. The method of claim 10 , further comprising, while the battery has a voltage above the second value, instructing, by the battery charger, the adapter to reduce the voltage or the current in increments.

12. The method of claim 9 , wherein:

during the first time period, a first transistor and a third transistor are conducting and a second transistor and a fourth transistor are not conducting; and

during the second time period, the first transistor and the third transistor are not conducting and the second transistor and the fourth transistor are conducting.

13. The method of claim 9 , wherein the first time period is approximately equal to the second time period.

14. A system comprising:

an adapter configured to produce power;

a bus coupled to the adapter; and

a battery charger coupled to the adapter over the bus, the battery charger configured to:

during a first time period, charge a capacitor while charging a battery using the power, wherein the capacitor is in series with the battery during the first time period; and

during a second time period, discharge the capacitor while charging the battery using the power, wherein the capacitor is in parallel with the battery during the second time period;

wherein the battery charger includes:

a first transistor having a first current terminal, a second current terminal, and a first control terminal;

a second transistor having a third current terminal, a fourth current terminal, and a second control terminal, the third current terminal coupled to the second current terminal;

a third transistor having a fifth current terminal, a sixth current terminal, and a third control terminal, the fifth current terminal coupled to the fourth current terminal;

a fourth transistor having a seventh current terminal, an eighth current terminal, and a fourth control terminal, the fourth control terminal coupled to the second control terminal and the seventh current terminal coupled to the sixth current terminal; and

a fifth transistor having a ninth current terminal, a tenth current terminal, and a fifth control terminal, the ninth current terminal coupled to the eighth current terminal and the fifth control terminal coupled to the third control terminal; and

a capacitor having a first capacitor terminal and a second capacitor terminal, wherein the first capacitor terminal is coupled to the fourth current terminal and the second capacitor terminal is coupled to the eighth current terminal.

15. The system of claim 14 , wherein the battery charger includes a power stage having an adjustable current source and a voltage clamp.

16. The system of claim 14 , wherein the battery charger includes a power stage having an adjustable voltage source and a current clamp.

17. The system of claim 14 , wherein the battery charger includes a single-phase charge pump.

18. The system of claim 14 , wherein the battery charger includes a multi-phase charge pump.

19. The system of claim 14 , wherein the battery is coupled to the battery charger.