Just-in-time virtual per-VM swap space
Various embodiments disclosed herein are related to a non-transitory computer readable storage medium. In some embodiments, the medium includes instructions stored thereon that, when executed by a processor, cause the processor to send an indication of a first storage location to a destination host. In some embodiments, the first storage location includes content that is swapped out from a memory location in a source host. In some embodiments, the indication includes one or more of a logical address and a first physical address. In some embodiments, the medium includes instructions stored thereon that, when executed by a processor, cause the processor to map the logical address of the first storage location to a second physical address of a second storage location. In some embodiments, the destination host accesses the content of the first storage location.
1. A non-transitory computer readable storage medium comprising instructions stored thereon that, when executed by a processor, cause the processor to:
send an indication of a first storage location to a destination physical host, wherein the first storage location includes content that is swapped out from a memory location in a source physical host different from the destination physical host, wherein the indication includes one or more of (a) a logical address of the first storage location that maps to a first physical address of the first storage location or (b) the first physical address; and
map the logical address of the first storage location, for the source physical host, to a second physical address of a second storage location, wherein the logical address of the first storage location, for the destination physical host, maps to the first storage location, and wherein contents of the first storage location differ from contents of the second storage location,
wherein the destination physical host accesses the content of the first storage location.
2. The medium of claim 1 , wherein the destination physical host translates the logical address to the first physical address before the logical address is mapped to the second physical address.
3. The medium of claim 1 , further comprising instructions stored thereon that, when executed by the processor, cause the processor to present a view of each swap block device to the source physical host via a device mapper.
4. The medium of claim 1 , further comprising instructions stored thereon that, when executed by the processor, cause the processor to:
interpose on input/output (I/O) sent to one or more swap devices to access the first storage location; and
map the logical address to the second physical address using the interposition.
5. The medium of claim 1 , further comprising instructions stored thereon that, when executed by the processor, cause the processor to send second content of a second memory location from the source physical host to the destination physical host.
6. The medium of claim 5 , wherein the memory location is a first memory location, further comprising instructions stored thereon that, when executed by the processor, cause the processor to identify, in the source physical host, that the content of the first memory location is swapped out to the first storage location and that the second memory location includes the second content.
7. The medium of claim 1 , further comprising instructions stored thereon that, when executed by the processor, cause the processor to send the first storage location in place of page content of the memory location.
8. The medium of claim 1 , wherein mapping the logical address of the first storage location to the second physical address of the second storage location is in response to sending the indication of the first storage location to the destination physical host.
9. The medium of claim 1 , wherein the source physical host has access to content of the second storage location via the logical address of the first storage location.
10. An apparatus comprising a processor and a memory, wherein the memory includes programmed instructions that, when executed by the processor, cause the apparatus to:
send an indication of a first storage location to a destination physical host, wherein the first storage location includes content that is swapped out from a memory location in a source physical host different from the destination physical host, wherein the indication includes one or more of (a) a logical address of the first storage location that maps to a first physical address of the first storage location or (b) the first physical address; and
map the logical address of the first storage location, for the source physical host, to a second physical address of a second storage location, wherein the logical address of the first storage location, for the destination physical host, maps to the first storage location, and wherein contents of the first storage location differ from contents of the second storage location,
wherein the destination physical host accesses the content of the first storage location.
11. The apparatus of claim 10 , wherein the destination physical host translates the logical address to the first physical address before the logical address is mapped to the second physical address.
12. The apparatus of claim 10 , wherein the memory further includes programmed instructions that, when executed by the processor, cause the apparatus to present a view of each swap block device to the source physical host via a device mapper.
13. The apparatus of claim 10 , wherein the memory further includes programmed instructions that, when executed by the processor, cause the apparatus to:
interpose on input/output (I/O) sent to one or more swap devices to access the first storage location; and
map the logical address to the second physical address using the interposition.
14. The apparatus of claim 10 , wherein the memory further includes programmed instructions that, when executed by the processor, cause the apparatus to send second content of a second memory location from the source physical host to the destination physical host.
15. The apparatus of claim 14 , wherein the memory further includes programmed instructions that, when executed by the processor, cause the apparatus to identify, in the source physical host, that the content of the first memory location is swapped out to the first storage location and that the second memory location includes the second content.
16. The apparatus of claim 10 , wherein the memory further includes programmed instructions that, when executed by the processor, cause the apparatus to send the first storage location in place of page content of the memory location.
17. A computer-implemented method comprising:
send an indication of a first storage location to a destination physical host, wherein the first storage location includes content that is swapped out from a memory location in a source physical host different from the destination physical host, wherein the indication includes one or more of (a) a logical address of the first storage location that maps to a first physical address of the first storage location or (b) the first physical address; and
map the logical address of the first storage location, for the source physical host, to a second physical address of a second storage location, wherein the logical address of the first storage location, for the destination physical host, maps to the first storage location, and wherein contents of the first storage location differ from contents of the second storage location,
wherein the destination physical host accesses the content of the first storage location.
18. The method of claim 17 , wherein the destination physical host translates the logical address to the first physical address before the logical address is mapped to the second physical address.
19. The method of claim 17 , further comprising presenting a view of each swap block device to the source physical host via a device mapper.
20. The method of claim 17 , further comprising:
interposing on input/output (I/O) sent to one or more swap devices to access the first storage location; and
mapping the logical address to the second physical address using the interposition.
21. The method of claim 17 , further comprising sending second content of a second memory location from the source physical host to the destination physical host.
22. The method of claim 21 , further comprising identifying, in the source physical host, that the content of the first memory location is swapped out to the first storage location and that the second memory location includes the second content.