Electromigration evaluation methodology with consideration of thermal and signal effects
View Patent ↗A method for evaluating a heat sensitive structure involving identifying a heat sensitive structure in an integrated circuit design layout, the heat sensitive structure characterized by a nominal temperature, identifying a heat generating structure within a thermal coupling range of the heat sensitive structure, calculating an operating temperature of the first heat generating structure; calculating a temperature increase or the heat sensitive structure induced by thermal coupling to the heat generating structure at the operating temperature; and performing an electromigration (EM) analysis of the heat sensitive structure at an evaluation temperature obtained by adjusting the nominal temperature by the temperature increase induced by the heat generating structure.
1. A system for evaluating a heat sensitive structure of an integrated circuit design comprising:
a memory configured for maintaining integrated circuit design layout data, thermal data, process data, and operational parameters corresponding to the integrated circuit design;
a processor configured for accessing the memory and analyzing the integrated circuit design layout data to identify
a heat sensitive structure having a nominal temperature T nom ;
a first heat generating structure within a first thermal coupling range of the heat sensitive structure; and
a first heat dissipating structure within a second thermal coupling range of the heat sensitive structure;
the processor being further configured for
calculating a ΔT h1 for the heat sensitive structure induced by thermal coupling with the first heat generating structure;
calculating a ΔT c1 for the heat sensitive structure induced by thermal coupling with the first heat dissipating structure; and
conducting an electromigration (EM) evaluation of the heat sensitive structure at an adjusted evaluation temperature T E =T nom +ΔT h1 +ΔT c1 ; and
a network interface configured for transmitting a result of the EM evaluation for a design review.
2. The system according to claim 1 ,
wherein the first thermal coupling range and the second thermal coupling range are different.
3. The system according to claim 1 , wherein:
the processor is further configured for determining whether the integrated circuit design layout passes the EM evaluation; and
generating a new tape out file for manufacture of a semiconductor device according to the integrated circuit design in response to the integrated circuit design layout passing the EM analysis.
4. The system according to claim 1 , wherein:
the heat sensitive structure comprises a conductive line.
5. The system according to claim 1 , wherein:
the first heat generating structure is a fin field effect transistor (FinFET) structure.
6. The system according to claim 1 , wherein:
the first heat generating structure is a high-resistance (Hi-R) structure.
7. The system according to claim 1 , wherein:
the first heat generating structure is a first signal carrying structure.
8. The system according to claim 7 , wherein:
the processor is further configured for calculating an operating temperature T oph1 of the first heat generating structure as a function of a signal pattern applied to the first heat generating structure over a time period t.
9. The system according to claim 1 , wherein:
the processor is further configured for identifying a first heat sink element within a third thermal coupling range of the heat sensitive structure;
calculating an operating temperature T opc1 for the first heat sink element;
calculating a ΔT c1 for the heat sensitive structure induced by thermal coupling to the first heat sink element at the operating temperature T opc1 ; and
evaluating the heat sensitive structure at a further adjusted evaluation temperature T E =T nom +ΔT h1 +ΔT h2 +ΔT c1 .
10. A system for evaluating a heat sensitive structure of an integrated circuit design comprising:
a memory configured for maintaining integrated circuit design layout data, thermal data, process data, and operational parameters corresponding to the integrated circuit design;
a processor configured for accessing the memory and analyzing the integrated circuit design layout data to identify
a heat sensitive structure having a nominal temperature T nom ;
a first signal carrying structure within a first thermal coupling range of the heat sensitive structure;
a second signal carrying structure within a second thermal coupling range of the heat sensitive structure;
the processor being further configured for
calculating ΔT h1 for the heat sensitive structure induced by thermal coupling with the first signal carrying structure;
calculating ΔT h2 for the heat sensitive structure induced by thermal coupling with the second signal carrying structure; and
conducting an electromigration (EM) evaluation of the heat sensitive structure at an adjusted evaluation temperature T E =T nom +ΔT h1 +ΔT h2 .
11. The system according to claim 10 , wherein:
the processor is further configured for calculating an operating temperature T oph1 of the first signal carrying structure as a function of a waveform, a frequency, and a duty cycle of an electrical signal applied to the first signal carrying structure over a time period t.
12. The system according to claim 11 , wherein:
the processor is further configured for calculating an operating temperature T oph2 of the second signal carrying structure as a function of a waveform, a frequency, and a duty cycle of an electrical signal applied to the second signal carrying structure over the time period t.
13. The system according to claim 10 , wherein:
the processor is further configured for identifying a first heat sink element within a third thermal coupling range of the heat sensitive structure;
calculating an operating temperature T opc1 for the first heat sink element;
calculating a ΔT c1 for the heat sensitive structure induced by thermal coupling to the first heat sink element at the operating temperature T opc1 ; and
evaluating the heat sensitive structure at a further adjusted evaluation temperature T E =T nom +ΔT h1 +ΔT h2 +ΔT c1 .
14. The system according to claim 10 , further comprising:
a network interface configured for transmitting a result of the EM evaluation for a design review.
15. A system for evaluating a heat sensitive structure of an integrated circuit design comprising:
a memory configured for maintaining integrated circuit design layout data, thermal data, process data, and operational parameters corresponding to the integrated circuit design;
a processor configured for accessing the memory and analyzing the integrated circuit design layout data to identify
a heat sensitive structure having a nominal temperature T nom ;
a first heat sink element within a first thermal coupling range of the heat sensitive structure;
a second heat sink element within a second thermal coupling range of the heat sensitive structure, wherein the first and second thermal coupling ranges are different;
the processor being further configured for calculating a ΔT c1 for the heat sensitive structure induced by thermal coupling with the first heat sink element;
calculating a ΔT c2 for the heat sensitive structure induced by thermal coupling with the second heat sink element; and
conducting an electromigration (EM) evaluation of the heat sensitive structure at an adjusted temperature T E =T nom +ΔT c1 +ΔT c2 .
16. The system according to claim 15 , wherein:
the processor is further configured for calculating the nominal temperature T nom by analyzing a self-heating effect ΔT for the heat sensitive structure and an environmental temperature condition T env , with T nom =T env +ΔT.
17. The system according to claim 15 , wherein:
the processor is further configured for identifying a first heat generating element within a third thermal coupling range of the heat sensitive structure;
calculating an operating temperature T oph1 for the first heat generating element;
calculating a ΔT h1 for the heat sensitive structure induced by thermal coupling to the first heat sink element at the operating temperature T oph1 ; and
evaluating the heat sensitive structure at the evaluation temperature T E =T nom +ΔT c1 +ΔT c2 +ΔT h1 .
18. The system according to claim 15 , wherein:
the heat sensitive structure comprises a conductive line.
19. The system according to claim 17 , wherein:
the first heat generating element is a fin field effect transistor (FinFET) structure.
20. The system according to claim 15 , further comprising:
a network interface configured for transmitting a result of the EM evaluation for a design review.