System and method of inverter control
A control system and method for an inverter that reduces capacitor current through a DC bus capacitor of the inverter. The control system and method may generate switching signals for a plurality of switching circuits in a manner that reduces capacitor current through the DC bus capacitor.
1. A high power-density inverter system, the high power-density inverter system comprising:
a DC bus filter capacitor to be connected across terminals of a battery;
a dual 3-phase inverter to be connected across the terminals of the battery in parallel to the DC bus filter capacitor, wherein the dual 3-phase inverter comprises:
three H-bridges to be connected to respective three dual inductors of a three-phase electrical motor/generator, and
driver circuitry configured to supply respective driving signals to the H-bridges to switch voltage of the battery according to a pulse width modulation (PWM) scheme to regulate the motor/generator currents, i a (t), i b (t), i c (t), and voltage;
a current sensor connected in series with the battery and configured to output a battery-current signal, i bat (t) corresponding to a current through the battery; and
controller circuitry communicatively coupled with the current sensor and the driver circuitry, the controller circuitry configured to:
receive i bat (t) from the current sensor,
generate the driving signals based on a subset of a discrete number of instances of inverter DC-side current i inv (t) that satisfy |i bat (t)−i inv (t)|<ϵ→0 wherein i inv (t) is a linear combination of the motor/generator currents, i a (t), i b (t), i c (t) in accordance with i inv =(S a1 +S a2 )×i a +(S b1 +S b2 )×i b +(S c1 +S c2 )×i c , wherein S a1 , S a2 , S b1 , S b2 , S c1 , and S c2 , respectively represent the switching states of the three H-bridges, and
direct the driver circuity to supply the generated driving signals to the H-bridges of the dual 3-phase inverter.
2. The high power-density inverter system of claim 1 , wherein the subset of the discrete number of instances of i inv (t) has three instances of i inv (t) that are closest to i bat (t).
3. The high power-density inverter system of claim 1 , wherein, to generate the driving signals, the controller circuitry is configured to:
select the subset of the instances of i inv (t) from among the discrete number of instances of i inv (t),
calculate conduction times corresponding to the instances of i inv (t) of the subset, and
perform driving signal placement and planning.
4. The high power-density inverter system of claim 3 , wherein, to generate the driving signals, the controller circuitry is configured to compensate for deadtime for the placed and planned driving signals.
5. The high power-density inverter system of claim 1 , wherein, to generate the driving signals, the controller circuitry is configured to:
select optimal vectors to minimize DC ripple across the DC bus filter capacitor;
calculate switching timing for a target phase for the motor/generator voltage;
determine if the switching timing is compatible with the optimal vectors;
if the switching timing is compatible with the optimal vectors, select the optimal vectors as selected vectors for the PWM scheme;
if the switching timing is incompatible with the optimal vectors, determine and select sub-optimal vectors as the selected vectors for the PWM scheme; and
configure drive circuitry according the selected vectors for the PWM scheme.
6. The high power-density inverter system of claim 1 , wherein to select the subset of the instances of (t) from among the discrete number of instances of i inv (t), the controller circuitry is configured to operate the drive circuitry according to the selected subset of the instances.
7. The high power-density inverter system of claim 3 , wherein, to calculate the conduction times, the controller circuitry is configured to operate in accordance with the following:
[
t
0
t
1
t
2
]
=
[
A
0
cos
(
θ
0
)
A
1
cos
(
θ
1
)
A
2
cos
(
θ
2
)
A
0
sin
(
θ
0
)
A
1
sin
(
θ
1
)
A
2
sin
(
θ
2
)
1
1
1
]
-
1
×
[
3
2
×
M
×
cos
(
α
)
3
2
×
M
×
sin
(
α
)
1
]
,
wherein M is the modulation index, θ 0 , θ 1 , and θ 2 are the phase angles during the respective time periods t 0 , t 1 , t 2 , A 0 , A 1 , and A 2 are the amplitudes during the respective time periods t 0 , t 1 , t 2 , and α is the power factor.
8. The high power-density inverter system of claim 3 wherein, to perform driving signal placement, the controller circuitry is configured to determine a vector sequence of a discrete number of instances of vectors for the PWM scheme.
9. The high power-density inverter system of claim 1 , wherein the controller circuitry is implemented on an integrated circuit (IC) chip.
10. The high power-density inverter system of claim 9 , wherein the IC chip comprises one of a microcontroller, CMOS, or FPGA.