Associating multiple cursors with block family of memory device
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to perform operations comprising assigning a plurality of data streams to a block family comprising a plurality of blocks of a memory device; responsive to programming a first block associated with a first data stream of the plurality of data streams, associating the first block with the block family; and responsive to programming a second block associated with a second data stream of the plurality of data streams, associating the second block with the block family.
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, to perform operations comprising:
assigning a plurality of data streams to a block family comprising a plurality of blocks of a memory device;
responsive to programming a first block associated with a first data stream of the plurality of data streams, associating the first block with the block family;
responsive to programming a second block associated with a second data stream of the plurality of data streams, associating the second block with the block family; and
associating the block family with a threshold voltage offset bin which defines a set of threshold voltage offsets to be applied to a base voltage read level during read operations.
2. The system of claim 1 , wherein the processing device is further to perform operations comprising:
determining a threshold voltage offset associated with the block family;
computing a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the memory device; and
reading, using the modified threshold voltage, data from the first block.
3. The system of claim 1 , wherein the processing device is further to perform operations comprising:
opening the block family; and
closing the block family in response to failing to detect an active data programming thread.
4. The system of claim 1 , wherein the first block resides on a first die of the memory device and the second block resides on a second die of the memory device.
5. The system of claim 1 , wherein associating the first block with the block family further comprises:
appending, to block family metadata, a record associating the first block with the block family.
6. The system of claim 1 , wherein the processing device is further to perform operations comprising:
responsive to creating the block family, associating the block family with the threshold voltage offset bin.
7. The system of claim 6 , wherein the processing device is further to perform operations comprising:
responsive to detecting a triggering event, associating the block family with another threshold voltage offset bin.
8. A method comprising:
assigning, by a processor, a plurality of data streams to a block family comprising a plurality of blocks of a memory device;
responsive to programming a first block associated with a first data stream of the plurality of data streams, associating the first block with the block family;
responsive to programming a second block associated with a second data stream of the plurality of data streams, associating the second block with the block family; and
associating the block family with a threshold voltage offset bin which defines a set of threshold voltage offsets to be applied to a base voltage read level during read operations.
9. The method of claim 8 , further comprising:
determining a threshold voltage offset associated with the block family;
computing a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the memory device; and
reading, using the modified threshold voltage, data from the first block.
10. The method of claim 8 , further comprising:
opening the block family; and
closing the block family in response to failing to detect an active data programming thread.
11. The method of claim 8 , wherein the first block resides on a first die of the memory device and the second block resides on a second die of the memory device.
12. The method of claim 8 , wherein associating the first block with the block family further comprises:
appending, to block family metadata, a record associating the first block with the block family.
13. The method of claim 8 , further comprising:
responsive to creating the block family, associating the block family with the threshold voltage offset bin.
14. The method of claim 13 , further comprising:
responsive to detecting a triggering event, associating the block family with another threshold voltage offset bin.
15. A non-transitory computer-readable storage medium comprising instructions that,
when executed by a processing device operatively coupled to a memory device, perform operations comprising:
assigning, by a processor, a plurality of data streams to a block family comprising a plurality of blocks of a memory device;
responsive to programming a first block associated with a first data stream of the plurality of data streams, associating the first block with the block family;
responsive to programming a second block associated with a second data stream of the plurality of data streams, associating the second block with the block family; and
associating the block family with a threshold voltage offset bin which defines a set of threshold voltage offsets to be applied to a base voltage read level during read operations.
16. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is further to perform operations comprising:
determining a threshold voltage offset associated with the block family;
computing a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the memory device; and
reading, using the modified threshold voltage, data from the first block.
17. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is further to perform operations comprising:
opening the block family; and
closing the block family in response to failing to detect an active data programming thread.
18. The non-transitory computer-readable storage medium of claim 15 , wherein the first block resides on a first die of the memory device and the second block resides on a second die of the memory device.
19. The non-transitory computer-readable storage medium of claim 15 , wherein associating the first block with the block family further comprises:
appending, to block family metadata, a record associating the first block with the block family.
20. The non-transitory computer-readable storage medium of claim 15 , wherein the processing device is further to perform operations comprising:
responsive to creating the block family, associating the block family with the threshold voltage offset bin.